Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2002-03-28
2004-04-27
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
C711S154000
Reexamination Certificate
active
06728850
ABSTRACT:
BACKGROUND OF THE INVENTION
The present application claims priority upon Japanese Patent Application No. 2001-325132 filed on Oct. 23, 2001, which is herein incorporated by reference.
FIELD OF THE INVENTION
The present invention relates to a storage control device which stores and manages data sent from a host processor connected to communicate therewith, and particularly relates to a technique for optimizing a operational form of the storage control device.
DESCRIPTION OF THE RELATED ART
As is well known, processing performance of a computer system comprising a host processor, such as a host computer, and a storage control device, such as a disk array device, connected thereto highly depends on a processing speed of an input/output process from the storage control device to the host processor. A typical conventional technique for improving the processing speed of the storage control device is, for example, utilization of a cache memory, and various attempts have been made in the past regarding an efficient utilization of the cache memory (for example, refer to Japanese Patent Application Laid-open Publication No. 8-263380).
Incidentally, jobs conducted by the host processor in operation generally include both a job requiring a high input/output processing priority such as a transaction processing or an image data transmission, and a job that does not require much priority. In such a case, it is preferable upon operation of the computer system to prioritize the input/output process of a job having high priority.
However, in a conventional computer system, there are many cases where circumstances of the host processor are not always reflected in the processing of the storage control device. For example, even when there is contention between jobs in trying to allocate a cache memory resource, an order of data processing is not decided according to the processing priority. Thus, there may be cases where a low processing priority job (i.e., a job having a low processing priority) may be processed with priority over a high processing priority job (i.e., a job having a high processing priority).
SUMMARY OF THE INVENTION
An object of the present invention is to optimize an operational form of a storage control device by reflecting a processing priority of each job kept track of by a host processor to a processing of a storage control device. In order to solve the above and other problems, an aspect of the present invention is structured to comprise, in a storage control device storing data sent from a host processor connected to communicate therewith, means for storing a plurality of response times respectively corresponding to each of a plurality of storage devices, wherein data sent from the host processor is stored in one of the storage devices, and the response time of a storage device is a time required from when an input/output request from the host processor is received until when a processing result of the request is sent to the host processor; means for respectively storing one or a plurality of response-time upper limit values assigned respectively to one or a plurality of files to be stored in the storage devices; and means for comparing the upper limit value of a file to be stored with each of the response times of each the storage devices, and for determining a storage device from the plurality of storage devices for storing the file according to a result of the comparison.
Further, in another aspect of the present invention, in the above structure, the means for determining a storage device may be structured to determine a storage device of which response time is equal to or less than the upper limit value of the file to be stored.
On the other hand, in still another aspect of the present invention, the storage control device may comprise means for storing a plurality of response times respectively corresponding to each of a plurality of storage devices, wherein data sent from the host processor is stored in one of the storage devices, and the response time of a storage device is a time required from when an input/output request from the host processor is received until when a processing result of the request is sent to the host processor; means for respectively storing one or a plurality of response-time upper limit values assigned respectively to one or a plurality of directories to be stored in the storage devices; and means for comparing the upper limit value of a directory to be stored with each of the response times of each the storage devices, and for determining a storage device from the plurality of storage devices for storing the directory according to a result of the comparison.
Further, in another aspect of the present invention, the storage control device may be structured to store one or a plurality of response-time upper limit values assigned respectively to one or a plurality of groups respectively comprising a plurality of files, or one or a plurality of response-time upper limit values assigned respectively to one or a plurality of groups respectively comprising a plurality of directories, or one or a plurality of response-time upper limit values assigned respectively to one or a plurality of groups respectively including at least one file and at least one directory; and the storage control device may comprise means for comparing the upper limit value of one of the groups to be stored with each of the response times of each the storage devices, and for determining a storage device from the plurality of storage devices for storing the group according to a result of the comparison.
Further, in case a plurality of host processors are connected to the storage control device, the storage control device may store response-time upper limit values assigned respectively to each of the files respectively for each of the plurality of host processors; and the storage control device may comprise means which makes the means for determining a storage device function respectively for each of the plurality of host processors. Further, the present invention may be structured to use an average disk service rate (ADSR) or a data transfer amount (throughput) instead of the response time.
Further, in another aspect of the present invention, the storage control device may use an average disk service rate (ADSR) or a throughput instead of the response time.
REFERENCES:
patent: 5367473 (1994-11-01), Chu et al.
patent: 6144961 (2000-11-01), de la Salle
patent: 6189080 (2001-02-01), Ofer
patent: 6272571 (2001-08-01), Bachmat
patent: 6470420 (2002-10-01), Hospodor
patent: 08-263380 (1996-10-01), None
Gotoh Youichi
Yokohata Shizuo
Hitachi , Ltd.
Moazzami Nasser
Townsend and Townsend / and Crew LLP
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