Patent
1996-01-16
1998-10-13
Sheikh, Ayaz R.
395309, 395310, 395883, 395892, 395285, H01J 1300
Patent
active
058225480
ABSTRACT:
A universal asynchronous receiver/transmitter (UART) computer programming interface emulates three-wire interface control. A register select circuit is supplied with address signals from a host CPU and has a plurality of register outputs organized into first and second groups. One of these groups of outputs are those which are required for three-wire operation in communications devices; and these outputs are mapped to the appropriate communications devices or registers. The other group of outputs required for three-wire operation, but with no corresponding function in a communications device, are implemented by means of an UART emulator circuit producing a data output which is coupled to an internal data bus, along with the output of the registers for the communications devices.
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Harrow Scott E.
Simmons Laura E.
Story Franklyn H.
Phan Raymond N.
Ptak LaValle D.
Sheikh Ayaz R.
VLSI Technology Inc.
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