Sensor to predict void free films using various grating...

Data processing: measuring – calibrating – or testing – Calibration or correction system – For mechanical system

Reexamination Certificate

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Details

C438S014000, C438S016000, C427S008000, C427S009000, C427S010000, C356S601000

Reexamination Certificate

active

06684172

ABSTRACT:

TECHNICAL FIELD
The present invention generally relates to reducing voids during metal processing in a semiconductor device. In particular, the present invention relates to characterizing a metal fill process and a metalization tool.
BACKGROUND ART
The use of and demand for semiconductor devices are increasing. Constant development of these devices requires constant improvements in size, performance and yield. These improvements are accomplished by improving the various processes used in semiconductor fabrication. Processes involving metal are often a challenge for sort yield and process control.
One process used in semiconductor fabrication is metalization. Metalization generally involves forming metal structures including metal layers, interconnects, conductive lines, contacts and plugs. These metal structures are vital to the function of semiconductor devices. The reliability, speed, and efficiency of semiconductor devices is directly linked to the quality of metal structures formed therein.
For example, some metalization processes involve depositing a metal in a trench or via. In many instances, the metal filled via or trench may also undesirably contain voids. Voids lower the conductivity of the metal structure, and thus deleteriously effect the speed and reliability of the semiconductor device. The voids result from poor fill performance. Poor fill performance is exacerbated by the continuing trend to decrease the size of semiconductor devices, and consequently, the size of metal structures therein. Attempting to fill trenches or voids of different sizes (dimensions) may lead to poor fill performance.
Referring to
FIG. 1
, a conventional metal fill process is shown illustrating the problem of void formation. On a semiconductor substrate
10
containing trenches
12
, a metal material
11
is deposited. Often times, undesirable voids
16
form in the metal material
11
being deposited into the trenches
12
of the semiconductor substrate
10
.
The high purity metal and metal sources intended for use in semiconductor fabrication are expensive. Wasting such metal, for example, by overfilling a trench or via, leads to increased costs as well as increased fabrication time to remove wasted metal from wafer substrates (by polishing, etching, and the like).
Poor fill performance is additionally or alternatively attributable to inconsistent tool performance. Wafer to wafer, day to day, week to week, and month to month toll performance unfortunately varies, sometimes negligibly, other times markedly. Tool variance results from extended use, poor maintenance, changes in environmental conditions, and the like.
SUMMARY OF THE INVENTION
The present invention provides systems and methods for improving metal fill performance and tool characterization. A standard calibration wafer containing at least one of vias or trenches of varying dimensions is fabricated. The standard calibration wafer is subjected to a metalization fill process, and using a sensor to monitor the process, it can be optimized. Specifically, the sensor facilitates characterizing the fill process, so that optimized parameters can be applied in the fabrication of a semiconductor device. Moreover, after removing the metal from the standard calibration wafer, repeated use of the standard calibration wafer in a metalization fill process can facilitate the characterization/calibration of the metalizing tool.
For example, a system can employ one or more light sources arranged to project light onto one or more features and/or gratings on a wafer, and one or more light sensing devices (e.g., photo detector, photodiode) for detecting light reflected and/or refracted by the one or more features and/or gratings. A grating is usually divided into a large number of sufficiently thin planar grating slabs to approximate an arbitrary profile. The light reflected from the one or more features and/or gratings is indicative of at least one parameter of the metalization processes (e.g., percent completion of a metal fill) that can be measured to determine whether desired fill or critical dimensions (CDs) have been achieved and to determine whether adaptations to the fill process should be undertaken in order to optimize the process.
As a result of the present invention, higher quality metal structures may be formed in semiconductor devices improving reliability, efficiency, and speed; a decreasing amount of valuable metal is wasted thereby improving costs associated with metalization; and tool characterization is enabled thereby improving consistency in wafer to wafer metalization. Specifically in relation to a metalization fill process, the present invention mitigates and/or eliminates the formation of voids and mitigates and/or eliminates overfilling vias and trenches.
One aspect of the invention relates to a metal fill process involving providing a standard calibration wafer having a plurality of fill features of known dimensions in a metalization tool; depositing a metal material over the standard calibration wafer; monitoring the deposition of metal material using a sensor system, the sensor system operable to measure one or more fill process parameters and to generate fill process data; controlling the deposition of metal material to minimize void formation using a control system wherein the control system receives fill process data from the sensor system and analyzes the fill process data to generate a feed-forward control data operative to control the metalization tool; and depositing metal material over a production wafer in the metalization tool using the fill process data generated by the sensor system and the control system.
Another aspect of the invention relates to a tool characterization process involving characterizing a metal fill process using a standard calibration wafer in a metalization tool; depositing metal material over another standard calibration wafer having the same dimensions as the standard calibration wafer in the metalization tool using the same fill process parameters; and comparing the fill process data of the other standard calibration wafer with the fill process data of the standard calibration wafer to characterize the metalization tool.


REFERENCES:
patent: 4073964 (1978-02-01), Herrmann
patent: 4141780 (1979-02-01), Kleinknecht et al.
patent: 4939370 (1990-07-01), Meyer et al.
patent: 5552327 (1996-09-01), Bachmann et al.
patent: 5754297 (1998-05-01), Nulman
patent: 6383824 (2002-05-01), Lensing
patent: 6493070 (2002-12-01), Jaing et al.

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