Masks and method for contact hole exposure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S943000, C438S945000, C438S950000, C430S005000, C430S322000, C430S394000

Reexamination Certificate

active

06759328

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to semiconductor manufacturing, and particularly to photolithography.
2. Description of the Related Art
In the manufacture of semiconductor wafers, photolithography is used to pattern various layers on a wafer. A layer of resist is deposited on the wafer and exposed using an exposure tool and a template such as a mask. During the exposure process a form of radiant energy such as ultraviolet light is directed through the mask to selectively expose the resist in a desired pattern. The resist is then developed to remove either the exposed portions for a positive resist or the unexposed portions for a negative resist, thereby forming a resist mask on the wafer. The resist mask can then be used to protect underlying areas of the wafer during subsequent fabrication processes, such as deposition, etching, or ion implantation processes.
An integral component of photolithography is the mask. The mask includes the pattern corresponding to features (e.g., transistors or polygates) at a layer of the integrated circuit (IC) design. The mask is typically a transparent glass plate coated with a patterned light blocking material such as, for example, Chromium. This type of mask is typically referred to as a binary mask since light is completely blocked by the light blocking material and fully transmitted through the transparent glass portions.
There are problems with the PSM mask. Light passing through the edge of contact hole patterns within the mask (e.g., the boundary between a light blocking region and a transparent region) is oftentimes diffracted. This means that instead of producing a very sharp image of the contact holes on the resist layer, some lower intensity light diffracts beyond the intended contact hole boundary and into the regions expected to remain dark. Hence, the resultant feature shapes and sizes deviate somewhat from the intended IC design. Since integrated circuit manufacturers have continued to reduce the geometric size of the IC features, this diffraction produces wafers with incomplete or erroneous circuit patterns.
FIG. 1
illustrates a portion of a mask
10
for contact hole patterns. The mask
10
comprises a transparent portion
20
that permits transmission of radiant energy, such as ultraviolet light.
FIG. 2
illustrates the printable patterns on a photoresist
30
after an exposure and a development using the mask
10
. There are not only a plurality of circular contact holes
40
but also side lobes
50
produced by diffraction among the contact holes
40
.
As known in the art, the side lobe effect becomes more pronounced as the spacing between the IC features decreases, especially for contact hole formation. That is, when contact holes are designed close to each other, as in the current trend, the electric field and intensity components associated with the side lobes of each feature begin to overlap and add up. This causes side lobes of greater amplitude and increases the side lobe effect. Sometimes, the amplitude of these “additive” side lobes is greater than the amplitude of the desired features, which further corrupts the fabrication process.
One way to solve the side lobe problem in photolithography is the application of a phase-shifting mask (PSM). Dummy patterns are designed in a PSM to reduce side lobe by diffraction. However, it is difficult to fabricate the PSM.
Increasing the degree of coherence of the lens is another way to solve the above mentioned side lobe problem. However, the depth of focus (DOF) decreases with the increase. Thus, the process window of photolithography is narrow.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a mask and method for contact hole exposure to avoid side lobe problems.
The method comprises the following steps. First, a mask including a transparent substrate, a phase shift layer installed on the transparent substrate to define a series of patterns having contact hole areas set in array, an a plurality of metal lines installed on the phase shift layer between the adjacent contact hole areas is provided. Then, an exposure is performed by transmitting a light source, such as deep ultraviolet (UV), extreme ultraviolet, or X-ray, through the mask after the metal lines absorb high degree diffraction waves.
The present invention also provides a mask for contact hole exposure. The mask comprises a transparent substrate, a phase shift layer installed on the transparent substrate to define a series of patterns having rectangular contact hole areas set in a array, and a plurality of metal lines installed on the phase shift layer to absorb high degree diffraction waves produced during exposure.
As the concept of the present invention, the contact hole area can be rectangular and about 100~300 nm. The pitch between the hole areas is about 300~600 nm.
As the concept of the present invention, the transparent substrate comprises quartz. The metal lines comprise Chromium, and the phase shift layer comprises MoSiON.


REFERENCES:
patent: 5965303 (1999-10-01), Huang
patent: 6051345 (2000-04-01), Huang
patent: 2002/0094482 (2002-07-01), Mansfield et al.

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