Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-07-07
2004-01-27
Thomas, Tom (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S342000, C257S343000, C257S339000, C438S153000, C438S154000, C438S212000, C438S268000
Reexamination Certificate
active
06683347
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a vertical semiconductor structure that facilitates realizing both a high breakdown voltage and a high current capacity in insulated gate field effect transistors (MOSFET's), insulated gate bipolar transistors (IGBT's), bipolar transistors, diodes and such semiconductor devices. The present invention also relates to a method of manufacturing the semiconductor device with such a vertical semiconductor structure.
BACKGROUND OF THE INVENTION
Semiconductor devices may be roughly classified as lateral semiconductor devices wherein electrodes are arranged on a major surface and vertical semiconductor devices wherein electrodes are distributed on both major surfaces opposing each other. When the vertical semiconductor device is ON, a drift current flows in the expansion direction of a drift layer, which becomes depleted by the reverse bias voltage when the vertical semiconductor device is OFF.
FIG. 19
is a cross section of a conventional planar n-channel vertical MOSFET. Referring now to
FIG. 19
, this vertical MOSFET includes a drain electrode
18
; an n+-type drain layer
11
with low resistance, to which drain electrode
18
is in electrical contact; a highly resistive n
−
-type drift layer
12
on n+-type drain layer
11
; a p-type base region
13
a
selectively formed in the surface portion of n
−
-type drift layer
12
; a heavily doped n
+
-type source region
14
selectively formed in p-type base region
13
a
; a gate electrode layer
16
above the extended portion of p-type base region
13
a
extended between n+-type source region
14
and n
−
-type drift layer
12
; a gate oxide film
15
between gate electrode layer
16
and the extended portion of p-type base region
13
a
; a source electrode
17
in common contact with the surfaces of n
+
-type source region
14
and p-type base region
13
a
; and a drain electrode
18
on the back surface of n
+
-type drain layer
11
.
In the vertical semiconductor device as shown in
FIG. 19
, highly resistive n
−
-type drift layer
12
works as a region for making a drift current flow vertically when the MOSFET is in the ON-state. Highly resistive n
−
-type drift layer
12
is depleted when the MOSFET is in the OFF-state, resulting in a high breakdown voltage of the MOSFET. Shortening the current path in highly resistive n
−
-type drift layer
12
is effective for substantially reducing the on-resistance (resistance between the drain and the source) of the MOSFET, since the drift resistance is lowered. However, the short current path in n
−
-type drift layer
12
causes breakdown at a low voltage, since the expansion width of the depletion layer that expands from the pn-junction between p-type base region
13
a
and n
−
-type drift layer
12
is narrowed and the electric field strength soon reaches the maximum (critical) value for silicon. In a semiconductor device with a high breakdown voltage, the characteristically thick n
−
-type drift layer
12
causes high on-resistance and therefore, losses increase. In short, there exists a tradeoff between the on-resistance and the breakdown voltage of the MOSFET. This tradeoff between the on-resistance and the breakdown voltage also exists in other semiconductor devices such as IGBT's, bipolar transistors and diodes. The tradeoff between the on-resistance and the breakdown voltage is also present in lateral semiconductor devices, in which the flow direction of the drift current in the ON-state of the devices is different from the expansion direction of the depletion layer in the OFF-state of the device.
EP0053854, U.S. Pat. Nos. 5,216,275, 5,438,215 and Japanese Unexamined Laid Open Patent Application H09(1997)-266311 disclose semiconductor devices that include a drift layer including heavily doped n-type regions and p-type regions alternately laminated with each other to solve the foregoing problems. The alternately laminated n-type regions and p-type regions are depleted to bear the breakdown voltage in the OFF-state of the device.
FIG. 20
is a cross section of a part of the vertical MOSFET according to an embodiment of U.S. Pat. No. 5,216,275. The vertical MOSFET of
FIG. 20
is different from the vertical MOSFET of
FIG. 19
in that the vertical MOSFET of
FIG. 20
includes a drift layer
22
, that is not single-layered, but consists of n-type drift regions
22
a
and p-type drift regions
22
b
alternately laminated with each other. In the figure, there is a p-type base region
23
a
, an n
+
-type source region
24
, a gate electrode
26
, a source electrode
27
, and a drain electrode
28
.
Drift layer
22
is formed in the following manner. First, a highly resistive n-type layer is grown epitaxially on an n
+
-type drain layer
21
. The n
−
-type drift regions
22
a
are formed by etching the highly resistive n-type layer to form trenches down to n
+
-type drain layer
21
. Then, p-type drift regions
22
b
are formed by epitaxially growing p-type layers in the trenches.
Hereinafter, the semiconductor device, including an alternating conductivity type drift layer that makes a current flow in the ON-state of the device and is depleted in the OFF-state of the device, will be referred to as a “semiconductor device with an alternating conductivity type layer.”
The dimensions described in U.S. Pat. No. 5,216,275 are as follows. When the breakdown voltage is put in VB, the thickness of the drift layer
22
is 0.024V
B
1.2
(&mgr;m). When n-type drift region
22
a
and p-type drift region
22
b
have the same thickness b and the same impurity concentration, the impurity concentration is 7.2×10
16
V
B
−0.2
/b (cm
−3
). If V
B
is 800 V and b &mgr;m, the drift layer
22
will be 73 &mgr;m in thickness and the impurity concentration 1.9×10
16
cm
−3
. Since the impurity concentration for the single-layered drift layer is around 2×10
14
cm
−3
, the on-resistance is reduced. However, when using conventional epitaxial growth techniques, it is difficult to bury a good quality semiconductor layer in such a narrow and deep trench (with a large aspect ratio).
The tradeoff between the on-resistance and the breakdown voltage is also commonly encountered in lateral semiconductive devices. The foregoing references, EP0053854, U.S. Pat. No. 5,438,215 and Japanese Unexamined Laid Open Pat. Application H09(1997)-266311, disclose lateral semiconductor devices with an alternating conductivity type layer and methods, common to the lateral semiconductor devices and vertical semiconductor devices, for forming the alternating conductivity type layer which employ selective etching technique for digging trenches and epitaxial growth techniques for filling the trenches. In manufacturing the lateral semiconductor device, it is relatively easy to employ selective etching techniques and epitaxial growth techniques to form an alternating conductivity type layer, since thin epitaxial layers are laminated one by one.
However, it is difficult to employ the selective etching technique for digging trenches and using an epitaxial growth technique for filling the trenches in manufacturing the vertical semiconductor devices with alternating conductivity type layer as explained with reference to U.S. Pat. No. 5,216,275. Japanese Unexamined Laid Open Patent Application H09(1997)-266311 describes the nuclear transformation by a neutron beam and such radioactive beams. However, such nuclear transformation processes require large facilities and cannot be used easily.
OBJECTS AND SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the invention to provide a semiconductor device with alternating conductivity type layer that reduces the tradeoff relation between the on-resistance and the breakdown voltage.
It is another object of the invention to provide a semiconductor device with an alternating conductivity type layer and with a high breakdown voltage that facilitates increasing the current capacit
Baker & Botts LLP
Fuji Electric & Co., Ltd.
Kang Donghee
Thomas Tom
LandOfFree
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