Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2001-06-25
2004-04-27
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S585000, C438S645000
Reexamination Certificate
active
06727173
ABSTRACT:
TECHNICAL FIELD
The invention pertains to methods of forming and utilizing antireflective material layers, and to methods of forming transistor gate stacks.
BACKGROUND OF THE INVENTION
Semiconductor processing frequently involves providing a photoresist layer over a substrate. Portions of the photoresist layer are subsequently exposed to light through a masked light source. The mask contains clear and opaque regions defining a pattern to be created in the photoresist layer. Regions of the photoresist layer which are exposed to light are made either soluble or insoluble in a solvent. If the exposed regions are soluble, a positive image of the mask is produced in the photoresist. The photoresist is therefore termed a positive photoresist. On the other hand, if the non-irradiated regions are dissolved by the solvent, a negative image results. Hence, the photoresist is referred to as a negative photoresist.
A difficulty that can occur when exposing photoresist to radiation is that waves of radiation can propagate through the photoresist to a layer beneath the photoresist and then be reflected back up through the photoresist to interact with other waves propagating through the photoresist. The reflected waves can constructively and/or destructively interfere with other waves propagating through the photoresist to create periodic variations of light intensity within the photoresist. Such variations of light intensity can cause the photoresist to receive non-uniform doses of energy throughout its thickness. The non-uniform doses can decrease the accuracy and precision with which a masked pattern is transferred to the photoresist. Accordingly, it is desired to develop methods which suppress radiation waves from being reflected by layers beneath a photoresist layer.
A method which has been used with some success to suppress reflected waves is to form an antireflective material beneath a photoresist layer. Antireflective materials are typically materials which absorb radiation and thereby therefore quench reflection of the radiation. Antireflective materials absorb various wavelengths of radiation with varying effectiveness. The number of materials available for use as antireflective materials is limited. Accordingly, it is desired to develop alternative methods of varying the wavelengths absorbed, and effectiveness with which the wavelengths are absorbed, for antireflective materials.
A particular type of antireflective coating material is a deposited antireflective coating (DARC). An exemplary DARC is Si
x
O
y
N
z
, wherein x is from about 40 to about 60, y is from about 29 to about 45, and z is from about 10 to about 16. The DARC can comprise, for example, Si
50
O
37
N
13
. A DARC can be formed by, for example, chemical vapor deposition on a substrate at about 400° C. and under a pressure of from about 4 Torr to about 6.5 Torr, utilizing SiH
4
and N
2
O as precursors. The DARC material can be deposited either with or without a plasma being present in a reaction chamber during the deposition. A typical goal in utilizing a DARC film is to reduce reflected radiation reaching an overlying layer of photoresist to less than 10% of incident radiation at the DARC film.
A prior art process utilizing a DARC material is described with reference to a semiconductive wafer fragment
10
in FIG.
1
. Wafer fragment
10
comprises a substrate
12
. Substrate
12
can comprise, for example, monocrystalline silicon lightly doped with a background p-type dopant. To aid in interpretation of the claims that follow, the term “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A gate dielectric layer
14
, polysilicon layer
16
, and silicide layer
18
are formed over substrate
12
. Gate dielectric layer
14
can comprise, for example, silicon dioxide; polysilicon layer
16
can comprise, for example, conductively doped polysilicon; and silicide layer
18
can comprise, for example, tungsten silicide or titanium silicide. Layers
14
,
16
and
18
are to be ultimately patterned into a transistor gate structure.
An antireflective coating layer
20
is provided over silicide layer
18
, and a photoresist layer
22
is provided over antireflective coating layer
20
. Antireflective coating layer
20
can comprise, for example, an inorganic layer such as Si
x
O
y
N
2
. In practice the layer can be substantially inorganic, with the term “substantially inorganic” indicating that the layer can contain a small amount of carbon (less than 1%).
Silicide layer
18
is preferably subjected to an anneal to improve a crystalline structure and a conductivity of the silicide layer prior to utilization of the layer in a transistor gate. The anneal of silicide layer
18
can comprise, for example, a temperature of 850° C. and a pressure of 1 atmosphere for a time of 30 minutes.
DARC material
20
is typically provided over silicide layer
18
prior to the anneal to protect layer
18
from gaseous oxygen during the anneal. If gaseous oxygen interacts with layer
18
during the anneal, the oxygen can oxidize a portion of layer
18
and adversely effect conductivity of layer
18
. Unfortunately, the anneal conditions can detrimentally influence optical properties of DARC material
20
. Specifically, DARC material
20
has optical properties that can be described by a refractive index coefficient (n) and an extinction coefficient (energy absorption coefficient) (k). The anneal conditions which improve conductivity of silicide layer
18
can alter one or both of “n” and “k” of layer
20
. A stoichiometry of the materials of layer
20
is typically carefully chosen to adjust “n” and “k” of the material to appropriate parameters which will substantially quench reflected radiation before the radiation reaches photoresist layer
22
. The effect of the anneal conditions on “n” and “k” can push such parameters out of an optimum adjusted range. Accordingly, it is desired to develop methods of forming DARC materials wherein “n” and “k” of the materials will be resistant to anneal condition induced changes.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a semiconductor processing method wherein silicon, nitrogen and oxygen in gaseous form are exposed to a high density plasma during deposition of a silicon, nitrogen and oxygen containing solid layer over a substrate.
In another aspect, the invention encompasses a semiconductor processing method of photolithographic processing. A metal silicide layer is formed over a substrate. An antireflective material layer is deposited over the metal silicide utilizing a high density plasma. A layer of photoresist is formed over the antireflective material layer. The layer of photoresist is photolithographically patterned.
In yet another aspect, the invention encompasses a transistor gate stack forming method. A polysilicon layer is formed over a substrate. A metal silicide layer is formed over the polysilicon layer. An antireflective material layer is deposited over the metal silicide utilizing a high density plasma. A layer of photoresist is formed over the antireflective material layer. The layer of photoresist is photolithographically patterned to form a patterned masking layer from the layer of photoresist. A pattern is transferred from the patterned masking layer to the antireflective material layer, metal silicide layer and polysilicon layer to pattern the antireflective material layer, metal silicide layer and polysilicon layer into a transistor gate stack.
REFERENCES:
patent: 4158717 (1979-06-01), Nelson
patent: 4444617 (1984-04-01), Whitcomb
patent: 4474975 (1984-10-01), Clemons et al.
patent: 4552783 (1985-11-01), Stoll et al.
patent: 45
Sandhu Gurtej S.
Sharan Sujit
Elms Richard
Smith Brad
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