Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2003-02-28
2004-03-16
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S624000
Reexamination Certificate
active
06706630
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Preferred embodiments of the invention pertain to the prevention of electromigration in metal wiring elements of an integrated circuit.
2. Background Technology
Integrated circuits (ICs) are manufactured by forming discrete semiconductor devices such as MOSFETS and bipolar junction transistors on a semiconductor substrate, and then forming a back end metal wiring network that connects those devices to create circuits. The wiring network is composed of individual metal wires called interconnects that generally lay parallel to the plane of the substrate. Interconnects are connected to the semiconductor devices by vertical contacts and are connected to other interconnects by vertical vias. A typical wiring network employs multiple levels of interconnects and vias.
The performance of integrated circuits is determined in large part by the conductivity and capacitance of the wiring network. Copper (Cu) has been adopted as the preferred metal for wiring networks because of its low resistivity compared to other conventional metals such as tungsten (W) and aluminum (Al), and because of its low cost compared to other low resistivity metals such as silver (Ag) and gold (Au). High quality Cu is also easily formed by damascene (inlay) processing using wet plating techniques such as electroplating or electroless plating followed by annealing.
Although Cu provides the aforementioned desirable features, it also has detrimental characteristics that must be addressed in order to produce functional products. One problem with Cu is its tendency to diffuse into surrounding semiconductor and insulating substrate materials. This diffusion degrades the semiconductive or insulative properties the surrounding material, and also affects the adhesion of the copper to the substrate. As a result, it is now conventional to provide a diffusion barrier between the copper and surrounding material. Conventional Cu diffusion barrier materials include titanium (Ti), W, chromium (Cr), tantalum (Ta), and tantalum nitride (TaN).
Another detrimental characteristic of Cu wiring is its susceptibility to oxidation. Cu is typically oxidized by strong chemical oxidizing agents that are conventionally included in the chemical mechanical polishing (CMP) slurries typically employed in damascene processing, and by exposure to the ambient atmosphere following CMP. Cu oxide layers are brittle and increase the risk of circuit disconnect or reduced conductivity. Cu oxide also increases the contact resistance in connections made with other conductive elements. The conventional technique for eliminating Cu oxide involves plasma treatment of the Cu surface using a reducing agent such as ammonia (NH
3
), followed by in situ deposition (i.e. deposition performed prior to removing the substrate from the deposition chamber) of a layer of a protective material such as silicon nitride (SiN) or a selectively deposited protective metal layer.
Another detrimental characteristic of Cu is its susceptibility to electromigration. Electromigration is the physical transport of Cu atoms and ions in the direction of current flow within the Cu conductor as the result of momentum transfer caused by collisions with flowing electrons. The current flow also creates a thermal gradient along the conductor that increases the mobility of the Cu atoms and ions. Electromigration can produce thinning of the Cu conductor and eventual separation to form an open circuit, resulting in circuit failure. Electromigration is pronounced in the vicinity of Cu oxide. One approach to reducing electromigration is doping of the Cu with an alloying element that inhibits electromigration. Some alloying elements have also been found to reduce Cu diffusion.
FIGS. 1
a
-
1
h
show structures at successive stages in the formation of an alloyed copper conductive element of an integrated circuit in accordance with conventional processing.
FIG. 1
a
shows a typical intermediate structure formed during copper damascene processing. The structure includes a substrate comprising a layer of an interlevel insulating material
10
. A conductive via
12
is inlaid in the substrate. A trench
16
is formed in the substrate
10
to expose the via
12
, and a layer of a barrier material
14
covers the substrate.
FIG. 1
b
shows the structure of
FIG. 1
a after formation of a conformal alloy layer
18
over the barrier layer
14
by physical vapor deposition or “sputtering.” The alloy layer
18
comprises an alloying element for preventing electromigration of Cu.
FIG. 1
c
shows the structure of
FIG. 1
b
after formation of a conformal layer of copper
20
over the substrate to fill the trench. The copper layer
20
is formed by electroplating or electroless plating.
FIG. 1
d
shows the structure of
FIG. 1
c
during annealing. The elevated temperatures used during annealing to improve the crystalline structure of the copper also cause diffusion of the alloying element from the alloy layer
18
into the copper layer
20
as indicated by the arrows. The degree of diffusion is determined by the time and temperature of the anneal.
FIG. 1
e
shows the structure of
FIG. 1
d
during CMP. CMP is performed by rotating the substrate and applying a rotating polishing disc
22
to the rotating substrate. A chemical mechanical slurry
24
comprising abrasive elements and oxidizing elements is provided between the substrate and the polishing disc. After the overburden is removed, the substrate is treated with a post-CMP rinsing agent to remove the CMP slurry.
FIG. 1
f
shows the structure of
FIG. 1
e
after completion of chemical mechanical polishing. The copper layer above the substrate is polished away, leaving an alloyed copper conductive element
26
inlaid in the substrate. A polishing residue
28
remains on the surface of the substrate. The residue
28
is typically a mixture of the CMP slurry and the post-CMP rinsing agent. An oxide cap
30
is formed on the copper conductive element
26
as the result of exposure to the CMP slurry, the rinsing agent, and atmospheric oxygen.
FIG. 1
g
shows the structure of
FIG. 1
f
during plasma treatment. The substrate is exposed to a reducing plasma such as ammonia (NH
3
) at a temperature of 300-400 degrees C and a voltage of 50 to 200 volts for a time of about 5 to 200 seconds. The reducing plasma removes the Cu oxide cap and also removes any remaining CMP residue.
FIG. 1
h
shows the structure of
FIG. 1
g
after in situ deposition of a cap layer such as SiN or selectively deposited metal. The cap layer protects the copper conductive element
26
and prevents diffusion from the surface of the copper conductive element
26
.
The processing shown in
FIGS. 1
a
-
1
h
differs from conventional copper damascene processing in that it includes the additional processing step shown in
FIG. 1
b
for forming the alloying layer
18
. However, this additional processing step increases the time, cost and complexity of the fabrication process. Further, this manner of alloying tends to produce non-uniform alloy densities in trenches of different widths because the proportion of the trench that is filled by the alloy layer increases as the width of the trench decreases.
SUMMARY OF THE INVENTION
In accordance with embodiments of the invention, the introduction of alloying elements into a metal conductive element is performed in situ in conjunction with conventional post-CMP reducing treatment of conventional copper damascene processing. The source of the alloying elements in preferred embodiments may be a source gas introduced into the plasma chamber. Alternatively, the source of the alloying elements may be a CMP residue comprising a CMP slurry or a post-CMP rinse that includes an alloying element. By controlling the time, temperature and pressure of the plasma treatment, diffusion of the alloying element into the metal conductive element is promoted, eliminating the need for a separate alloy layer deposition step. This provides alloying without adding substantially increasing processing complexity, and provides un
Nelms David
Vu David
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