Semiconductor power component and a corresponding...

Details Semiconductor power component and a corresponding... Semiconductor power component and a corresponding...

2002-04-10

2004-01-06

Cuneo, Kamand (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S565000

Reexamination Certificate

active

06674125

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor power component and a corresponding method of manufacture.
Although it is applicable to other similar semiconductor power components, the present invention as well as the problem underlying it are discussed with reference to a vertical IGBT (Insulated Gate Bipolar Transistor).
BACKGROUND INFORMATION
In general, IGBTs may be used as power switches in the range of some hundreds to some thousands of volts of blocking voltage. In particular, the use of IGBTs of this type as ignition transistors, i.e., as switches on the primary side of an ignition coil, may be of particular interest.
The structure of a vertical IGBT may be similar to that of a VDMOS transistor, although with the difference that, in the VDMOS transistor, on its anode side a p
+
-emitter may be arranged in place of an n
+
-substrate. German Published Patent Application No. 31 10 230 describes a vertical MOSFET component having the basic structure of a vertical IGBT.
In principle, two types of vertical IGBT, or V-IGBT may be distinguished in this context, namely the so-called punch-through IGBT (PT) and the so-called non-punch-through IGBT, as described, for example, in Laska et al., Solid State Electronics, Vol. 35, No. 5, pp. 681-685.
On the basis of
FIGS. 7 and 8
, the fundamental characteristics of these two IGBT types are described below.
FIG. 7
shows a schematic cross-sectional representation of an NPT-IGBT, whose active region, designated by reference numeral
200
, has cell-shaped or strip-shaped MOS miniature-circuit-breaker assemblies
203
,
206
,
207
,
208
,
209
. In this context, reference numeral
208
specifically designates a p-body zone,
206
an n
+
-source region,
207
a p
+
-contact region for joining p-body zone
208
to a cathode terminal
201
, which at the same time is connected to n
+
-source region
206
,
203
a gate terminal,
209
a gate oxide, and
210
an intermediate oxide. Furthermore,
204
designates an n
−
-drift region,
205
a reverse-side p
+
-emitter, and
202
an anode terminal.
The NPT-IGBT in accordance with
FIG. 7
may be manufactured on a low-doped n
−
-substrate having a high charge carrier service life. After introducing the diffusion profile on front side VS of the wafer for producing MOS miniature-circuit-breaker assemblies
203
,
206
,
207
,
208
,
209
, on rear side RS of the wafer, p
+
-emitter
205
is produced in very planar form having only a few &mgr;m of penetration depth (d≈a few &mgr;m) and having poor emitter efficiency. This transparent emitter region
205
functions to rapidly switch off the current in the dynamic operation of this component in order to assure that the shut-off losses are kept small. To achieve satisfactory forward properties despite such a poor emitter region
205
, the carrier service life may need to be selected so as to be as high as possible in n
−
-drift region
204
. In addition, the thickness of n
−
-drift region
204
may be selected so as to be as small as possible, taking into account the desired blocking capacity of the component. As a consequence thereof, it may be required that very thin wafers be processed, in the range of blocking capacities of 1 kV and less. This may be very expensive and may have only become possible in recent years. As an example of this, see T. Laska et al., Conf. Proc. ISPSD'97, pp. 361-364.
FIG. 8
shows a schematic cross-sectional representation of a PT-IGBT, whose active region, represented by reference numeral
100
, has cell-shaped or strip-shaped MOS miniature-circuit-breaker assemblies
103
,
106
,
107
,
108
,
109
. Specifically, in this context, reference numeral
108
designates a p-body zone,
106
an n
+
-source region,
107
a p
+
-contact region for connecting p-body zone
108
to a cathode terminal
101
, which at the same time is connected to n
+
-source region
106
,
103
a gate terminal,
109
a gate oxide, and
110
an intermediate oxide. Furthermore,
104
designates an n
−
-drift region and
150
an n
−
-buffer region,
105
a rear-side p
+
-emitter, and
102
an anode terminal.
The PT-IGBT according to
FIG. 8
may be produced on a thick, p
+
-doped substrate, which simultaneously forms rear-side emitter region
105
, having an epitactically-applied n-buffer region
150
and epitactically applied n
−
-drift region
104
. Because, in order to achieve the smallest possible forward voltage drop, the thickness of n
−
-drift region
104
is selected so as to be smaller than is required by the width of the space-charge zone in the drift region at the desired blocking capacity, n-buffer region
150
may act to prevent a penetration of the space-charge zone to p
+
-emitter
105
. In order to achieve a rapid switching off of the current despite good emitter
105
, the charge-carrier service life may be kept short by a so-called lifetime killing, e.g., using electron irradiation, and/or the doping in n-buffer region
150
may be selected so as to be correspondingly heavy. Since the forward voltage may increase as the buffer dosage rises, it may be possible, using a heavily doped, thin buffer region
150
, to achieve a good compromise between the forward voltage and the switch-off performance. A buffer of this kind may only be achieved to a limited degree using this type of double EPI/substrate wafer, due to the buffer diffusion in the manufacture of the raw wafer.
In what follows, a brief discussion of the mode of functioning of the aforementioned IGBT types is provided.
For the forward case, in both IGBT types, gate terminal
103
, and
203
, opposite cathode terminal
101
, and
201
, is set at a potential above the threshold voltage of MOS miniature-circuit-breaker assemblies
103
,
106
,
107
,
108
,
109
, and
203
,
206
,
207
,
208
,
209
. Subsequently, in the area of p-body region
108
, and
208
, an inversion channel may be produced on the semiconductor surface beneath gate terminal
103
, and
203
. The semiconductor surface in the area of n
−
-drift region
104
, and
204
, may then be in a condition of accumulation. In response to a positive voltage at anode terminal
102
, and
202
, opposite the cathode, electrons are injected into n
−
-drift region
104
, and
204
, through n
+
-source regions
106
, and
206
, the influenced MOS channels in body regions
108
, and
208
, and the accumulation layer.
Subsequently, anode-side emitter region
105
, and
205
, injects holes, as a result of which n
−
-drift region
104
, and
204
, is flooded by charge carriers such that its conductivity may be increased. In customary forward-current densities, the n
−
-drift region may be in a state of high injection. As a result, an IGBT having a blocking capacity beginning at roughly 150-200 volts may be capable of conveying higher current densities having a smaller voltage drop between anode and cathode than a MOS transistor having the same breakdown voltage. In the forward case, the current flows from the anode to the cathode. It is carried by electrons that are injected into n
−
-drift region
104
, and
204
, and that flow to the anode via anode-side emitter
105
, and
205
, and by holes which are injected by the anode-side emitter into n
−
-drift region
104
, and
204
, and which flow to the cathode via p-regions
107
,
108
, and
207
,
208
.
In the blocking case, gate terminal
103
, and
203
, opposite cathode terminal
101
, and
201
, is brought to a voltage below the threshold voltage. If anode terminal
102
, and
202
, is now brought to a positive potential, then the space-charge zone situated between p-body region
108
, and
208
, and n
−
-drift region
104
, and
204
, may expand virtually exclusively into n
−
-drift region
104
, and
204
.
In the case of NPT-IGBT, the thickness of n
−
-drift zone
204
may be selected so as to be greater than the width of the space-charge zone at a given maximum blocking c

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