Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2001-01-31
2004-09-07
Elamin, A. (Department: 2116)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S006000, C710S029000, C710S058000, C710S036000, C703S023000, C703S024000, C711S158000, C711S167000
Reexamination Certificate
active
06789132
ABSTRACT:
FIELD OF THE INVENTION
This application relates generally to disc drives and more particularly to a control architecture for an AT type disc drive interface controller.
BACKGROUND OF THE INVENTION
There has been a constant demand in the disc drive industry to produce disc drives having greater performance and higher capacity. In the highly competitive disc drive industry, this goal of increasing performance and capacity is made more difficult by the competitive requirement to do so while limiting or reducing the overall cost of the disc drive. Additionally, the highly competitive nature of the disc drive industry has led to ever increasing constraints on the time allowed to develop and bring a new disc drive to market. As demand for these low cost, high capacity, and high performance disc drives grows, and as the time to develop these disc drives is decreased, the pressure to create new and innovated solutions has been tremendous.
One recent approach in the disc drive industry to meet these demands has been centered on integrating many of the previously separate functions and/or components of the disc drive into fewer, or monolithic routines or components. One disadvantage to the approach is the increased complexity and cost of these components. Owing to the increased complexity of the components the cost of equipment to test, program, and support these components is often increased. Additionally, due to the constraints on the time allowed to incorporate and implement these components, the manner in which these components, and the disc drive architecture as a whole, have been incorporated has often been in a piece meal or ad hoc manner. For example, often the code or system software which controls the various operations of the disc drive is designed and written in a linear, non-modular manner without particular regard to possible future changes or upgrades. As such, it is often necessary to start anew, or rewrite the system software whenever new features or capabilities are desired.
An area where increased complexity in disc drive technology is evident is in the area of disc drive microprocessor technology. In particular, a recent trend in the disc drive industry has been to incorporate ever more complex microprocessors or controllers to carry out various functions in the disc drive. A number of problems are encountered when incorporating these more complex processors and controllers. One of the principle problems with employing these complex microprocessors and controllers is their increased cost over simpler microprocessors and controllers. Another problem with today'complex microprocessors and controllers is that they often contain features and capabilities which are not or may not be required or employed in a given disc drive. Another problem with the more complex microprocessors and controllers, particularly is the time required for those involved in the development of the disc drive to become familiar with their operation and implementation.
Another trend in the disc drive industry is to incorporate microprocessors which allow for multitasking. Multitasking provides a microprocessor the ability to seemingly work on a number of tasks simultaneously. This is accomplished by quickly switching from one task to another, thus giving the appearance that the microprocessor is executing all of the tasks at the same time. The process of switching from one task to another is often referred to as context switching. Context switching is commonly carried out in a disc drive microprocessor by a scheduler/dispatcher, which provides a mechanism for the acceptance of tasks into the system and for the allocation of time within the system to execute those tasks.
Multitasking can be either preemptive or cooperative. In cooperative multitasking the scheduler/dispatcher relies on each task to voluntarily relinquish control back to the scheduler so that another task may be run. In preemptive miultitasking the scheduler decides which task receives priority, and parcels out slices of microprocessor time to each tasks and/or to portions of each task. In either preemptive or cooperative multitasking, some or all of the tasks will may have their own “context.” That is, each task may have its own priority, set of registers, stack area, program counter, timers, etc. These contexts are saved when a context switch occurs and/or when a system interrupt occurs. The tasks context is then restored when the task is resumed.
One disadvantage of multitasking is that it may introduce time delays into the system as the processor spends some of its time choosing the next task to run and saving and restoring contexts. However, multitasking typically reduces the worst-case time from task submission to task completion compared with a single task system where each task must finish before the next task starts. Additionally, multitasking saves processing time by allocating processor time to one task while another task is in a waiting state. If the disc drive microprocessor provides multitasking, the microprocessor will typically employ a scheduler/dispatcher to order and execute the tasks.
One solution to many of the above noted problems related to the increased complexity in disc drive architecture is to employ a digital signal processor (DSP) as the primary controller of the disc drive. DSP typically provide high computational speeds at a relatively low cost when compared to more complex microprocessors. Additionally, DSP are typically much less expensive than non-DSP type disc drive microprocessors. However, one significant problem with the use of DSPs is their traditionally inferior stack support and poor interrupt and context switch latency. As such, DSPs have not been favored in advanced disc drive device designs which employ multitasking, particular those which employ preemptive type multitasking.
Another trend in the industry is that towards asynchronous disc drive control systems. Typically, disc drive controllers must handle a number of asynchronous inputs, such as inputs from a host computer, inputs from the discs, and inputs from various service or interrupt systems within the disc drive. A common approach to dealing with these asynchronous inputs is to have control of these inputs handled asynchronously. While handling these asynchronous inputs in an orderly synchronous manner may be preferable to the asynchronous methods currently finding favor, disc drive designers have had great difficulty in designing synchronous systems which do not incur significant penalties in terms of speed.
It is with respect to these considerations and others that the present invention has been developed.
SUMMARY OF THE INVENTION
Against this backdrop the present invention has been developed. One aspect of the present invention involves a controller for a data storage device which includes a number of preemptive control modules, a number of non-preemptive control modules, and a scheduler module which is operative to control the execution of only the non-preemptive control modules. Preferably, the preemptive control modules handle timing critical operations, such as responses to interrupts from a host computer. The modularity of the disc drive controller provides for easy upgrading and debugging of the controller. Additionally, the non-preemptive modules reduce context switching time, which reduces latency in a data storage device which uses the controller.
Another aspect of the present relates to a data storage device having a data storage disc, an actuator assembly adjacent the disc including a read/write head, and a data storage device controller operably connected to the actuator assembly. The data storage device controller preferably includes a microprocessor, a computer readable medium, and number of non-preemptive operating modules. Each of the non-preemptive operating modules are preferably composed of microprocessor executable code operable to control a process within the data storage device controller. A scheduler for scheduling the order in which the microprocessor executes the non-preemptive operating modules is
Berger Derek J.
Lucente David K.
Seagate Technology LLC
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