Method of producing semiconductor device with a thin film...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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C438S151000, C438S057000, C438S059000

Reexamination Certificate

active

06682960

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for producing a semiconductor device, such as a photodetector in which elements, including photoelectric conversion elements and thin-film transistors (hereinafter referred to as “TFTs”), are formed on the same substrate. More particularly, the present invention relates to a method for producing a semiconductor device represented by a photodetector used for a one- or two-dimensional image-reading device in a facsimile machine, a digital copying machine, or a scanner, or for detecting radiation (e.g., X-rays or &ggr;-rays) converted to light in the photosensitive wavelength range of the photodetector by a fluorescent plate.
2. Description of the Related Art
Conventionally, reduction optical systems and reading systems using CCD sensors have been employed for facsimile machines, digital copying machines, and radiation detectors. However, recently, with the development of photoelectric conversion semiconductor materials such as amorphous silicon (hereinafter referred to as “a—Si film”), contact type linear sensors have been investigated and put into practical use, in which the sensor's photoelectric conversion elements are formed on a large substrate so as to read information without reducing the size of the information.
In particular, when employing the a—Si films, semiconductor layers in photoelectric conversion elements and switching TFTs can be advantageously formed at the same time because the a—Si films can be used not only for the photoelectric conversion material but also for the semiconductor material for the switching TFTs.
FIG. 1
is a cross-sectional diagram illustrating a PIN optical sensor as an example of optical sensors employing the a—Si films. There are shown a glass substrate
101
, a lower electrode
102
, a p-type semiconductor layer (hereinafter referred to as “p layer”)
103
, an i-type semiconductor layer (hereinafter referred to as “i layer”)
104
, an n-type semiconductor layer (hereinafter referred to as “n layer”)
105
, and a transparent electrode
106
.
FIG. 2
is a circuit diagram of the PIN optical sensor shown in FIG.
1
. There are shown a PIN optical sensor
110
, a power source
111
, and an output circuit
112
such as a current amplifier. The C and A sides shown in
FIG. 2
correspond to the sides of the transparent electrode
106
and the lower electrode
102
of
FIG. 1
, respectively. The voltage applied to the C side by the power source
111
is set to positive with respect to that of the A side.
The basic operation of the PIN optical sensor
110
will be briefly described with reference to
FIGS. 1 and 2
.
As is shown in
FIG. 1
, when light enters the i layer
104
from the direction shown by the arrow L in
FIG. 1
, the incident light is photoelectrically converted and creates electrons and holes. Due to an electric field applied to the i layer
104
by the power source
111
, the electrons move toward the C side, in other words, pass through the n layer
105
to the transparent electrode
106
, and the holes move towards the A side, in other words, the holes are transferred to the lower electrode
102
. A photoelectric current thereby flows in the optical sensor
110
.
If no light enters the optical sensor
110
, no electrons and holes are generated in the i layer
104
. Since the n layer
105
serves as a barrier for holes in the transparent electrode
106
and the p layer
103
functions as a barrier for electrons in the lower electrode
102
, neither the electrons nor the holes can move and no photoelectric current flows in the optical sensor
110
. Based on the above mechanism, the current in the circuit changes with the presence and absence of incident light. Such changes in the current are measured by the output circuit
112
shown in
FIG. 2
, and thus the optical sensor
110
detects incident light.
However, employing a PIN optical sensor such as shown in
FIG. 1
, it is difficult to achieve a photodetector having a high S/N ratio at a low cost, for the following reasons:
The first reason is that PIN optical sensors require barrier layers, i.e., p and n layers.
In the PIN optical sensor of
FIG. 1
, the n layer
105
must facilitate the movement of electrons to the transparent electrode
106
, and simultaneously, must prevent holes from entering the i layer
104
. If the n layer
105
does not exhibit one of these characteristics, the resulting photoelectric current decreases or a dark current, i.e., a current flowing when no light enters the optical sensor, appears or increases, causing a reduction in the S/N ratio.
In general, to improve the above characteristics of the n layer
105
, it is necessary to optimize various conditions such as the film-forming conditions for the i layer
104
and the n layer
105
and heat-treatment conditions after film-forming.
Meanwhile, the p layer
103
must facilitate the movement of holes to the lower electrode
102
, and simultaneously, must prevent electrons from entering the i layer
104
. Thus, similarly to the n layer
105
, various conditions for the i layer
104
and the p layer
103
must be optimized. In general, the conditions required for optimizing the n layers and those for the p layers are not the same, and thus it is very difficult simultaneously to satisfy the required conditions for the n layers and the p layers. In other words, it is difficult to produce an optical sensor having a high S/N ratio because two types of barrier layers, i.e., the p and n layers, are required to be formed in the same optical sensor.
The second reason will be explained with reference to FIG.
3
.
FIG. 3
is a cross-sectional diagram illustrating a switching TFT which is used in a controlling section for a photodetector. There are shown a glass substrate
101
, a lower electrode
102
, a gate insulating film
107
, an i layer
104
, an n layer
105
, and upper electrodes (i.e., source and drain electrodes)
160
.
The switching TFT is fabricated as follows: the lower electrode
102
functioning as a gate electrode G, the gate insulating film
107
, the i layer
104
, the n layer
105
, and the upper electrode
160
are formed on a glass substrate
101
in the above order; the upper electrode
160
is formed into the source and drain electrodes by etching; and then, a portion of the n layer
105
is removed to form a channel
170
. Since the characteristics of the switching TFT are largely affected by the conditions of the interface between the gate insulating film
107
and the i layer
104
, in general, the above film-forming process is continuously carried out under a vacuum or without the workpiece being exposed to air.
If the PIN optical sensor shown in
FIG. 1
is made on the same substrate on which the switching TFT is formed, production cost increases and the characteristics deteriorate. This is attributed to the differences in layer structures of the PIN optical sensor having the electrode, the p layer, the i layer, the n layer, and the electrode formed on the substrate in that order and the switching TFT having the electrode, the insulating layer, the i layer, the n layer, and the electrode formed on the substrate in that order. In other words, the PIN optical sensors and the switching TFTs cannot be formed simultaneously by the same process. Thus, the fabrication process becomes complicated such that film-forming steps and photolithographic steps are repeated for forming the required layers in the required regions, resulting in a decreased yield, higher cost, etc.
For example, when the PIN optical sensors and the switching TFTs can employ the same i layer and n layer, it is possible continuously to form the gate insulating layer and the p layer, remove portions of the p layer in the regions of the respective switching TFTs, and continuously form the i layer and the n layer, thus simplifying the fabrication process. However, the interface between the gate insulating film and the i layer, which interface is important for the switching TFT characteristics, and the interface between the p l

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