Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Quality evaluation
Reexamination Certificate
2001-12-13
2004-03-16
Barlow, John (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Quality evaluation
C700S116000, C700S121000
Reexamination Certificate
active
06708129
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus using metrology data from an integrated source for performing sampling of semiconductor wafer in a process flow.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer composed of a variety of materials may be formed above a wafer. Thereafter, a patterned layer of photoresist may be formed above the process layer using known photolithography techniques. Typically, an etch process is then performed on the process layer using the patterned layer of photoresist as a mask. This etching process results in formation of various features or objects in the process layer. Such features may be part of a completed integrated circuit device, e.g., a gate electrode structure for transistors. Many times, trench structures are also formed on the substrate of the semiconductor wafer. One example of a trench structure is a shallow trench isolation (STI) structure, which can be used to isolate electrical areas on a semiconductor wafer.
The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1
illustrates a typical semiconductor wafer
105
. The wafer
105
typically includes a plurality of individual semiconductor die
103
arranged in a grid
150
. Photolithography steps are typically performed by a stepper on approximately one to four die locations at a time depending on the specific photomask employed. Photolithography steps are generally performed to form patterned layers of photoresist above one or more process layers that are to be patterned. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the under-lying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features, such as a polysilicon line, or opening-type features, that are to be replicated in an underlying process layer.
Generally, in semiconductor-wafer manufacturing, wafers are processed before being analyzed by metrology tools. Subsequent processes performed on the wafers may lack the benefit of efficient metrology data analysis of the same wafers. By the time metro logy data is collected from a first process, the analysis is performed such that often the benefit of analysis and the modification data resulting from the analysis does not reach the next process performed on the semiconductor wafers
105
. Generally, metrology data analysis and the processing of semiconductor wafers
105
are separate functions performed in a manufacturing setting.
Turning now to
FIG. 2
, one example of a block diagram representation of a typical manufacturing process flow is illustrated. A set of semiconductor wafers
105
is processed by a manufacturing system (block
210
). Once the semiconductor wafers
105
are processed, offline metrology data is acquired (block
220
). Often, metrology data is acquired uniformly across a plurality of semiconductor wafers
105
. In other words, the same number of sites are generally analyzed on all of the processed semiconductor wafers
105
during acquisition and analysis of metrology data.
Once offline metrology data is acquired, the manufacturing system analyzes the metrology data (block
230
) and calculates correction factors to be implemented for the next processing run on the semiconductor wafers
105
(block
240
). These correction factors can be used to modify one or more control parameters that control the operations of the manufacturing system. The manufacturing system utilizes a finite amount of time to acquire metrology data and calculate correction data. If a second process performed on the semiconductor wafers
105
were performed immediately after the first process, it would be difficult to deliver correction data for implementation into the subsequent process. The manufacturing system generally acquires the metrology data, makes the correction calculations, and then performs the next run of semiconductor wafers
105
using the correction factors (block
250
).
The process flow described in
FIG. 2
provides for performing feed-forward corrections, although not necessarily in an efficient manner. Interruptions of the process flow from one process to another in order to acquire metrology data can slow down an assembly line that manufactures semiconductor wafers
105
. Interruptions in the process flow can also cause delay in delivery of products made from semiconductor wafers and other costs. The interruption suffered by the manufacturing line to produce feed-forward data can cause inefficiencies in a manufacturing environment. Any pause or interruption in manufacturing can be costly and can cause further deviations in critical accuracies that are needed for proper manufacturing of semiconductor wafers
105
. Furthermore, the correction data that is produced by the manufacturing system of
FIG. 2
generally is available too late for use in the second processing indicated in block
230
. Thus, semiconductor wafers
105
with non-corrected errors may be produced by the manufacturing system shown in FIG.
2
. Devices produced from the processed semiconductor wafers
105
may contain excessive amounts of errors, which can adversely affect the overall yield of the manufacturing process. Furthermore, inefficiencies due to many of the current manufacturing correction procedures can prove to be very costly.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method is provided for performing a process control using partial measurement data. A process operation is performed on a semiconductor wafer. Inline metrology data related to the process of the semiconductor wafer is acquired. A partial measurement data acquisition process is performed based upon the inline metrology data, the partial measurement data acquisition process comprising determining a time period for acquiring the inline metrology data, determining a number of wafers to be sampled based upon the time period, and determining a number of wafer sites for data ac
Pasadyn Alexander J.
Purdy Matthew A.
Barlow John
Cherry Stephen J.
Williams Morgan & Amerson P.C.
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