Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2003-06-27
2004-09-21
Thai, Luan (Department: 2827)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S151000, C438S128000, C438S048000
Reexamination Certificate
active
06794228
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 2002-41289, filed on Jul. 15, 2002, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly to a transflective liquid crystal display device and a fabricating method thereof by using a reduced number of masks.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices are developed as next generation display devices because of their characteristics of light weight, thin profile, and low power consumption.
In general, an LCD device is a non-emissive display device that displays images utilizing optical anisotropy properties of liquid crystal materials that are interposed between a thin film transistor (TFT) array substrate and a color filter (C/F) substrate. Presently, among the various type of LCD devices commonly used, active matrix LCD (AM-LCD) devices in which thin film transistors (TFTs) are disposed in a matrix for each pixel region have been developed because of their high resolution and superiority in displaying moving images.
FIG. 1
is a schematic cross-sectional view of a liquid crystal display device according to the related art.
In
FIG. 1
, first and second substrates
2
and
4
are spaced apart and facing each other, and a liquid crystal layer
6
is interposed therebetween. A gate electrode
8
is formed on an inner surface of the second substrate
4
and a gate insulating layer
9
is formed on the gate electrode
8
. A semiconductor layer
11
including an active layer
11
a
and an ohmic contact layer
11
b
is formed on the gate insulating layer
9
over the gate electrode
8
. Source and drain electrodes
13
and
15
are formed on the semiconductor layer
11
. The source and drain electrodes
13
and
15
are spaced apart from each other, and the active layer
11
a
corresponding to a space between the source and drain electrodes
13
and
15
functions as a channel “ch.” The gate electrode
8
, the semiconductor layer
11
, and the source and drain electrodes
13
and
15
constitute a thin film transistor (TFT) “T.” Even though not shown in
FIG. 1
, a gate line connected to the gate electrode
8
is formed along a first direction and a data line connected to the source electrode
13
is disposed along a second direction crossing the first direction. A pixel region “P” is defined by a cross of the gate line and the data line. A passivation layer
19
including a drain contact hole
17
is formed on the TFT “T” and a pixel electrode
21
connected to the drain electrode
15
through the drain contact hole
17
is formed in the pixel region “P.”
A color filter layer
23
corresponding to the pixel electrode
21
is formed on an inner surface of the first substrate
2
. The color filter layer transmits only light of a specific wavelength. A black matrix
27
is formed at a border between the adjacent color filter layers
23
to prevent a light leakage and an inflow of ambient light into the TFT “T.” A common electrode
29
is formed on the color filter layer
23
and the black matrix
27
to apply a voltage to the liquid crystal layer
6
. To prevent a leakage of the liquid crystal layer
6
, a peripheral portion of the first and second substrates
2
and
4
is sealed with a seal pattern
31
. A spacer
33
is disposed between the first and second substrates
2
and
4
to keep a uniform cell gap with the seal pattern
31
. A first orientation film (not shown) can be formed between the common electrode
29
and the liquid crystal layer
6
, and a second orientation film (not shown) can be formed between the liquid crystal layer
6
and the pixel electrode
21
to induce an alignment of the liquid crystal layer
6
.
Even though not shown in
FIG. 1
, the LCD device includes a backlight unit under the second substrate
4
as a light source. However, the incident light from the backlight unit is attenuated during the transmission so that the actual transmittance is only about 7%. Accordingly, the backlight unit of the LCD device requires high brightness, thereby increasing power consumption by the backlight unit. Thus, a relatively heavy battery is required to supply a sufficient power to the backlight unit of such a device, and the battery cannot be used outdoors for a long period of time because of the increased power requirements.
In order to overcome the problems described above, a reflective LCD device and a transflective LCD device have been developed. The reflective LCD device uses the ambient light instead of light from the backlight unit, and thus it is light weight and easy to carry. In addition, power consumption of the reflective LCD device is reduced so that the reflective LCD device can be used for a portable display device such as an electronic diary or a personal digital assistant (PDA). In the reflective and transflective LCD devices, a reflective layer of a metallic material having a high reflectance is formed in a pixel region. The reflective layer can be formed in the pixel region over or under a transmissive electrode. More recently, the transmissive electrode is formed over the reflective layer to induce an alignment of the liquid crystal layer easily. Even with this structure, a transflective LCD having a multiple-layered insulating layer is suggested for protection of the reflective layer and to prevent an electrical short between the transmissive electrode and the reflective layer.
FIGS. 2A
to
2
G are schematic cross-sectional views showing a fabricating process of a display region of an array substrate for a transflective liquid crystal display device including a multiple-layered insulating layer according to the related art, and
FIGS. 3A
to
3
G are schematic cross-sectional views showing a fabricating process of a non-display region of an array substrate for a transflective liquid crystal display device including a multiple-layered insulating layer according to the related art. Patterns on the array substrate are formed through a mask process including a deposition, a coating, a photolithography and an etching, and figures are shown according to a number of the mask process.
In
FIGS. 2A and 3A
, a gate electrode
10
and a first align key
12
of a first metallic material are formed on a substrate
4
through a first mask process.
In
FIGS. 2B and 3B
, after a gate insulating layer
14
of a first insulating material is formed on the gate electrode
10
and the first align key
12
, a semiconductor layer
16
including an active layer
16
a
of amorphous silicon (a-Si) and an ohmic contact layer
16
b
of impurity-doped amorphous silicon (n+ a-Si) is formed on the gate insulating layer
14
over the gate electrode
10
through a second mask process.
In
FIGS. 2C and 3C
, source and drain electrodes
18
and
22
of a second metallic material are formed on the semiconductor layer
16
through a third mask process. The source and drain electrodes
18
and
22
are spaced apart from each other. At the same time, a data line
20
connected to the source electrode
18
is formed on the gate insulating layer
14
, and a second align key
24
is formed on the gate insulating layer
14
over the first align key
12
. The gate electrode
10
, the semiconductor layer
16
, and source and drain electrodes
18
and
22
constitute a thin film transistor (TFT) “T.”
In
FIGS. 2D and 3D
, after first, second and third passivation layers
25
,
26
and
28
are sequentially formed on the TFT “T” and the second align key
24
, a first open portion
30
exposing the second align key
24
is formed in the first, second and third passivation layers
25
,
26
and
28
through a fourth mask process. The first open portion
30
is for preventing the second align key
24
from being screened by the relatively thick second passivation layer
26
. Thus, a mask for the fourth mask process can have a simpler structure than that of the previous first to third mask processes.
In
FIGS. 2E and 3E
,
LG.Philips LCD Co. , Ltd.
McKenna Long & Aldridge LLP
Thai Luan
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