Method for erasing data stored in a nonvolatile memory device

Static information storage and retrieval – Floating gate – Particular biasing

Patent

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Details

36518511, 36523003, G11C 700

Patent

active

059403268

ABSTRACT:
A method for erasing data stored in a memory having a plurality of memory sectors is disclosed, including the steps of loading at least a dummy address bit and a plurality of address bits, checking whether an address corresponding to a first sector has been latched, and recycling the checking operation against a second sector when the address of the first sector is not latched, and performing an erase operation for a sector assigned to an address latched therein until the erase operation is done for a last sector. The address includes the dummy address bit and the address bits, so that a coding logic can be simplified without identifying with the logic configuration of a programming mode.

REFERENCES:
patent: 4905191 (1990-02-01), Arai

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