Abrading – Machine – Rotary tool
Reexamination Certificate
2000-10-13
2004-05-18
Hail, III, Joseph J. (Department: 3723)
Abrading
Machine
Rotary tool
C451S287000, C451S041000
Reexamination Certificate
active
06736708
ABSTRACT:
TECHNICAL FIELD
The present invention relates to planarizing machines for microelectronic substrate assemblies, and methods of mechanical and chemical-mechanical planarization of microelectronic substrate assemblies.
BACKGROUND OF THE INVENTION
Mechanical and chemical-mechanical planarizing processes (collectively “CMP”) are used in the manufacturing of microelectronic devices for forming a flat surface on semiconductor wafers, field emission displays (FEDs) and many other types of microelectronic substrate assemblies.
FIG. 1
schematically illustrates a planarizing machine
10
with a platen or table
20
, a carrier assembly
30
, a polishing pad
40
, and a planarizing fluid
44
on the polishing pad
40
. The planarizing machine
10
may also have an under-pad
25
attached to an upper surface
22
of the platen
20
for supporting the polishing pad
40
. In many planarizing machines, a drive assembly
26
rotates (arrow A) and/or reciprocates (arrow B) the platen
20
to move the polishing pad
40
during planarization.
The carrier assembly
30
controls and protects a substrate
12
during planarization. The carrier assembly
30
typically has a substrate holder
32
with a backing pad
34
that holds the substrate
12
via suction, and a drive assembly
36
of the carrier assembly
30
typically rotates and/or translates the substrate holder
32
(arrows C and D, respectively). The substrate holder
32
, however, may be a weighted, free-floating disk (not shown) that slides over the polishing pad
40
.
The combination of the polishing pad
40
and the planarizing fluid
44
generally define a planarizing environment that mechanically and/or chemically-mechanically removes material from the surface of the substrate
12
. The polishing pad
40
may be a conventional polishing pad composed of a polymeric material (e.g., polyurethane) without abrasive particles, or it may be an abrasive polishing pad with abrasive particles fixedly bonded to a suspension material. In a typical application, the planarizing fluid
44
may be a CMP slurry with abrasive particles and chemicals for use with a conventional nonabrasive polishing pad. In other applications, the planarizing fluid
44
may be a chemical solution without abrasive particles for use with an abrasive polishing pad.
To planarize the substrate
12
with the planarizing machine
10
, the carrier assembly
30
presses the substrate
12
against a planarizing surface
42
of the polishing pad
40
in the presence of the planarizing fluid
44
. The platen
20
and/or the substrate holder
32
then move relative to one another to translate the substrate
12
across the planarizing surface
42
. As a result, the abrasive particles and/or the chemicals in the planarizing medium remove material from the surface of the substrate
12
.
CMP processing is particularly useful in fabricating FEDs, which are one type of flat panel display in use or proposed for use in computers, television sets, camcorder viewfinders, and a variety of other applications. FEDs have a base plate with a generally planar emitter substrate juxtaposed to a faceplate.
FIG. 2
illustrates a portion of a conventional FED base plate
120
with a glass substrate
122
, an emitter layer
130
, and a number of emitters
132
formed on the emitter layer
130
. An insulator layer
140
made from a dielectric material is disposed on the emitter layer
130
, and an extraction grid
150
made from polysilicon or a metal is disposed on the insulator layer
140
. A number of cavities
142
extend through the insulator layer
140
, and a number of holes
152
extend through the extraction grid
150
. The cavities
142
and the holes
152
are aligned with the emitters
132
to open the emitters
132
to the faceplate (not shown).
Referring to
FIGS. 2 and 3
, the emitters
132
are grouped into discrete emitter sets
133
in which the bases of the emitters
132
in each set are commonly connected. As shown in
FIG. 3
, for example, the emitter sets
133
are configured into columns (e.g., C
1
-C
2
) in which the individual emitter sets
133
in each column are commonly connected by a high-speed column interconnect
170
. Additionally, each emitter set
133
is proximate to a grid structure super adjacent to the emitters that is configured into rows (e.g., R
1
-R
3
) in which the individual grid structures are commonly connected in each row by a high-speed row interconnect
160
. The row interconnects
160
are generally formed on top of the extraction grid
150
, and the column interconnects
170
are formed under the extraction grid
150
on top of the emitter layer
130
. It will be appreciated that the column and row assignments were chosen for illustrative purposes.
One concern in manufacturing FEDs is that emitters in the center of the base plate may be damaged during CMP processing because FED base plates generally have a significant curvature or bow that makes it difficult to uniformly remove material from the base plates. In a typical process for fabricating the base plate
120
shown in
FIG. 2
, a number of conformal layers are initially deposited over the emitters
132
, and then the substrate assembly is planarized. For example, a conformal dielectric layer is initially deposited over the emitter layer
130
and the emitters
132
to provide material for the insulator layer
140
. A conformal polysilicon or amorphous silicon layer is then deposited on the insulator layer
140
to provide material for the extraction grid
150
, and a conformal metal layer is deposited over the grid layer to provide material for the row interconnects
160
. The internal stresses in the insulator layer
140
and the extraction grid layer
150
generally cause the base plate
120
to have a convex “bow” so that the center of the base plate
120
has a downward curvature when it is mounted to the substrate holder of the planarizing machine.
After all of the conformal layers are deposited, the base plate sub-assembly
120
is planarized by CMP processing to form a planar surface at an elevation just above the tips of the emitters
132
. CMP processing, however, may remove much more material from the center of the base plate
120
than the perimeter regions because the FED base plate
120
may have a downward curvature in the substrate carrier. As a result, CMP processing may either severely damage the extraction grid and the emitter sets at the center of FED base plates, or it may not remove enough material to expose the extraction grid and the emitter sets at the perimeter regions. The failure to accurately form the emitter sets and the extraction grid across the whole surface of the FED base plate will cause black or gray spots on the resulting FED face plate where pixels are not illuminated. Thus, CMP processing can destroy a whole FED even though only a small fraction of the extraction grid and emitter sets are inoperable.
Another manufacturing concern of CMP processing is that there is a significant drive to fabricate semiconductor devices on large wafers to increase the yield of IC-device fabrication, and to develop large FEDs that can be used in computers, televisions and other large scale applications. The destruction of IC-devices or emitter sets during CMP processing, however, is particularly problematic for applications using twelve-inch diameter or larger substrates because the film stresses exacerbate bowing in larger substrates. For example, because the bow in a base plate with a sixteen-inch diagonal measurement is generally about 150 &mgr;m and the emitters have a height of only about 1.0-2.0 &mgr;m, CMP processing can easily damage or destroy a large number of emitters at the center of the substrate. It will be appreciated that similar results occur to IC-devices in the center of twelve-inch diameter substrates. Thus, CMP processes are currently impeding progress in cost-effectively manufacturing large FEDs or semiconductor devices on large microelectronic substrates.
SUMMARY OF THE INVENTION
The present invention is directed toward planarizing machines for microelec
Dorsey & Whitney LLP
Hail III Joseph J.
Micro)n Technology, Inc.
Shakeri Hadi
LandOfFree
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