Method of manufacturing a semiconductor chip

Details Method of manufacturing a semiconductor chip Method of manufacturing a semiconductor chip

2002-04-18

2004-07-06

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S598000, C438S622000, C438S637000, C438S129000

Reexamination Certificate

active

06759316

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a structure of a semiconductor device and a method of manufacturing the semiconductor device.
A background technology of the present invention is disclosed, for example, in Japanese Laid-open Patent No. 9-223759.
According to the disclosure in the above patent, a solder bump can be formed just on an electrode in a good condition by melting a solder ball directly put on the electrode. However, the disclosed semiconductor device can not get a sufficient characteristic because a common plane can not be formed. Further, the disclosed semiconductor device can not get a sufficient heat radiation efficiency because heat only radiates from the back side of the semiconductor device.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device having a good characteristic and a good heat radiation efficiency.
In order to accomplish the foregoing object, a semiconductor device according to the present invention has a semiconductor element including pad electrodes formed on the electrode area thereof, a first insulation layer formed on the circuit formation area of the semiconductor element, and a first circuit pattern formed on said first insulation layer. The first circuit pattern-electrically connected to the pad electrodes. The semiconductor device of the present invention further has a second insulation layer formed on the first circuit pattern including a first through hole for exposing the first circuit pattern, and a second circuit pattern formed on the second insulation layer. The second circuit pattern is electrically connected to the pad electrodes and has a second through hole for exposing the first circuit pattern. The semiconductor device of the present invention further has first external electrodes electrically connected to said second circuit pattern and second external electrodes electrically connected to the first circuit pattern through the first and second through holes.


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