Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2002-01-02
2004-09-14
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S031000, C365S227000
Reexamination Certificate
active
06791354
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, more particularly to a semiconductor integrated circuit having memory cell arrays arranged in a matrix form.
2. Description of the Related Art
To respond to requests for a decrease in a breakdown voltage of a gate oxide film and lower power consumption by micro-fabricating a transistor structure, a power source voltage (operation voltage) of a semiconductor integrated circuit has recently become low. A transistor operates at a higher speed, in proportion as an effective gate voltage which is a value obtained by subtracting its threshold voltage from its operation voltage is higher. However, since the threshold voltage of the transistor is little dependent on the power source voltage, the effective gate voltage of the transistor becomes low according to a decrease in the power source voltage. Consequently, an operation speed of the transistor is made slower in proportion as the power source voltage is lower.
To maintain the high-speed operation of the transistor, the effective gate voltage of the transistor needs to be maintained by decreasing its threshold voltage in accordance with a drop of the power source voltage. Meanwhile, as the threshold voltage of the transistor becomes lower, a sub-threshold leak current, which flows between a drain and a source of the transistor even if a gate-source voltage of the transistor is made to equal to 0 V, increases. Therefore, if the threshold voltage of the transistor is dropped to maintain its high-speed operation, a standby current of the semiconductor integrated circuit increases.
A technology is disclosed in Japanese Unexamined Patent Application Publication No. Hei 5(1993)-210976, in which a switching transistor is disposed between a power supply line and a source electrode of a transistor to decrease a standby current. Even when a threshold voltage of the transistor is decreased, this technology prevents the standby current from being increased by turning off the switching transistor during a standby state.
However, since the switching transistor acts as a load on the power supply line when an internal circuit of a semiconductor integrated circuit operates, there has been a problem that the arrangement of the switching transistor decreases an operation speed of the circuit. It is possible to prevent a decrease in the operation speed of the circuit by making a size of the switching transistor large. However, in this case, because a sub-threshold leak current of the switching transistor increases, the standby current increases. Accordingly, when the switching transistor is arranged between the circuit and the power supply line, it has been difficult to satisfy both of the operation speed of the circuit and the standby current.
In Japanese Unexamined Patent Application Publication No. Hei 8(1996)-321763, a technology is disclosed, in which by applying a voltage different from a power source voltage to a gate of a switching transistor, an internal circuit is allowed to operate at a high speed and an increase in a standby current is controlled. In this technology, a gate-source voltage of the switching transistor is made to be high during an operation of the internal circuit, whereby a capability to supply a current to the internal circuit is enhanced. The gate-source voltage of the switching transistor is made to be negative during the standby of the internal circuit, whereby a cutoff characteristic is improved.
However, in order to set the gate-source voltage of the switching transistor to a voltage different from the power source voltage, a voltage generating circuit (a high voltage generating circuit, a negative voltage generating circuit or the like) is necessary. Therefore, there has been a problem that an extra current is consumed by the voltage generating circuit and the standby current cannot be decreased as the whole semiconductor integrated circuit even when the cutoff characteristic during the standby state is improved. Moreover, since amplitude of a gate voltage of the switching transistor becomes large, a charge and discharge current for a gate capacitance increases. Accordingly, when a change between an active state and a standby state is often made, there has been a problem that consumption current increase.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor integrated circuit capable of decreasing current consumption during a standby state of the semiconductor integrated circuit without lowering the operation speed of the circuit.
According to one of the aspects of the present invention, a semiconductor integrated circuit has a plurality of switching transistors which connect power supply terminals of a plurality of first circuit blocks to a power supply line, respectively. The power supply terminals of the first circuit blocks operating at different timings among the first circuit blocks are connected to each other by an internal power supply line. A power supply control circuit simultaneously turns on the switching transistors connected to the internal power supply line in response to operation(s) of at least any one of the first circuit blocks connected to the internal power supply line. Therefore, when a certain first circuit block operates, a power source current is supplied to the first circuit block via the plurality of switching transistors. Since a total size of the switching transistors for the first circuit block in operation can be made large, a power source resistance (or a ground resistance) of a power source connected to the first circuit block can be decreased and an operation speed of the first circuit block can be increased compared to that of conventional art.
Since the plurality of switching transistors can be shared among the first circuit blocks which do not operate simultaneously, the total size of the switching transistors can be made smaller compared to a case where the switching transistors are arranged for each of the first circuit blocks. As a result, an increase in a total sum of sub-threshold currents of the switching transistors can be prevented when the first circuit blocks do not operate, and a current when the first circuit blocks do not operate (standby current) can be decreased. Furthermore, since the switching transistors can be shared among the first circuit blocks which do not operate simultaneously, each chip size can be made small.
Accordingly, a semiconductor integrated circuit operating at a high speed can be constituted without increasing the standby current. Particularly, in a semiconductor integrated circuit constituting the first circuit blocks including internal transistors with decreased threshold voltages, both the operation speed and the standby current can be satisfied.
According to another aspect of the present invention, threshold voltages of the switching transistors are set to be higher than those of internal transistors included in the first circuit blocks. Since the plurality of switching transistors are connected to each other in parallel, even when the threshold voltages of the switching transistors are made higher and the sub-threshold leak current is further decreased, drivability of the switching transistors can be made equal to those before the threshold voltages thereof are made higher, by only making sizes of the respective switching transistors a little larger. More specifically, an increase in the chip size can be suppressed to the minimum, and the sub-threshold leak current can be further decreased.
According to another aspect of the present invention, source electrodes of the internal transistors turned off during a standby state of the semiconductor integrated circuit in each of the first circuit blocks are connected to the power supply line via the internal power supply line and the switching transistors. The switching transistors are connected only to such internal transistors as necessary for decreasing the standby current and the other internal transistors are directly connected to the
Mori Kaoru
Takita Masato
Yamada Shin-ichi
Arent & Fox PLLC
Chang Daniel D.
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