Method and structure for shipping a die as multiple products

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Details

C326S047000, C716S030000

Reexamination Certificate

active

06525560

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to programmable logic devices. More specifically, the present invention relates to a method and structure for enabling a programmable logic device to be configured in response to two different types of configuration bit streams.
DESCRIPTION OF RELATED ART
Programmable logic devices (PLDs) include configurable logic circuitry that can be configured to implement various functions in response to configuration bit streams. More specifically, a configuration bit stream is loaded into a configuration memory array on the PLD. The configurable logic circuitry is configured in response to the configuration data values stored in the configuration memory array.
A PLD provider may make several families of devices. For example, Xilinx, Inc., makes a Virtex™ family of field programmable gate arrays (FPGAs) and a Spartan™ family of FPGAs. In general, the Virtex™ family of FPGAs are premium devices, which are capable of providing better performance than the standard, low-cost Spartan™ family of FPGAs. For example, the premium Virtex™ devices are capable of operating at higher speeds than the standard Spartan™ devices. In addition, the premium Virtex™ devices are capable of providing resources, such as dedicated memory, that are not available in the standard Spartan™ devices.
In order to provide different families of PLDS, a PLD provider must fabricate different types of dies for each family of PLDs. In addition, the PLD provider must also establish an inventory system for the dies of the different families.
It would therefore be desirable to have a single die capable of operating as both a premium programmable logic device and a standard programmable logic device. Using the same die to supply both premium and standard programmable logic devices would simplify both fabrication and inventory control.
One issue associated with using the same die to implement both premium and standard programmable logic devices would be controlling the configuration of the die. It would be desirable to prevent a customer who purchases the standard programmable logic device (typically at a lower price than the premium programmable logic device) to configure the die to operate as the premium programmable logic device.
SUMMARY
Accordingly, the present invention provides a programmable logic device that includes a die having a first bond pad and a second bond pad, each being configured to be weakly pulled to a first voltage during normal operation of the programmable logic device. In one embodiment, the first voltage is a logic high voltage. A package enclosing the die includes an external pad configured to receive a second voltage during normal operation of the programmable logic device. If the first voltage is a logic high voltage, then the second voltage is a logic low voltage. A conductor is configured to selectively couple one and only one of first and second bond pads to the external pad, thereby forming an electrical path between the external pad and the selected bond pad. As a result, the bond pad coupled to the external pad is pulled down to the second voltage (e.g., a logic low voltage). The bond pad that is not coupled to the external pad is weakly pulled to the first voltage (e.g., a logic high voltage). The bond pad that is not coupled to the external pad is covered by an encapsulant of the package, thereby preventing a user from modifying the voltage on this bond pad.
The conductor is coupled to the first bond pad to indicate that the programmable logic device is only to be configured as a standard device. Similarly, the conductor is coupled to the second bond pad to indicate that the programmable logic device can be configured as a premium device. In one embodiment, the programmable logic device can be configured as either a premium device or a standard device if the conductor is coupled to the second bond pad.
An enable logic circuit on the die is coupled to the first bond pad and the second bond pad, thereby receiving the voltages on these bond pads. The enable logic circuit enables the die to be configured in response to a premium type of configuration bit stream if the first bond pad is pulled to the first voltage and the second bond pad is pulled to the second voltage. The enable logic circuit may optionally allow the die to be configured in response to the standard type of configuration bit stream if the first bond pad is pulled to the first voltage and the second bond pad is pulled to the second voltage.
Conversely, the enable logic circuit enables the die to be configured only in response to a standard type of configuration bit stream if the first bond pad is pulled to the second voltage and the second bond pad is pulled to the first voltage.
The enable logic circuit must be informed whether an incoming configuration bit stream is a premium or standard type of configuration bit stream in order to make the determination as to whether or not to allow the configuration bit stream to configure the programmable logic device. Thus, the die further includes a decoder circuit configured to receive the configuration bit stream, and determine whether the configuration bit stream is of the premium type or the standard type. Upon making this determination, the decoder circuit transmits a type control signal representative of the determined type of the configuration bit stream to the enable logic circuit.
In an alternative embodiment, only one bond pad on the die is used to indicate whether the programmable logic device can be configured by a premium type configuration bit stream or a standard type configuration bit stream. In this embodiment, the bond pad is coupled to the external pad to identify a premium programmable logic device, or not coupled to the external pad to identify a standard programmable logic device.
The present invention will be more fully understood in view of the following description and drawings.


REFERENCES:
patent: 5450022 (1995-09-01), New
patent: 5587607 (1996-12-01), Yasuda et al.
patent: 5705938 (1998-01-01), Kean
patent: 5880596 (1999-03-01), White
patent: 5982043 (1999-11-01), Iwata
“Applied Cryptography, Second Edition”, by Bruce Schneier, pp. 455-459, published by John Wiley and Sons, 1996.

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