Static information storage and retrieval – Read/write circuit – Noise suppression
Reexamination Certificate
2001-07-23
2003-02-25
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Noise suppression
C365S045000
Reexamination Certificate
active
06525977
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a circuit configuration in particular a semiconductor circuit configuration, with a protection device that analyzes interference signals in electrical input signals.
In many electrical systems and circuit configurations, specific signals are output by parts of the system, for example by drivers, and are made available and transferred to other parts of the system, such as receivers. What is problematic in such electrical systems, circuit configurations, in particular semiconductor circuit configurations, memory devices, DRAM elements or the like is that in many cases the actual signals that are to be received and further processed have an interference superposed on them, in particular in the form of interference signal spikes, which, on external data/command lines, can lead to malfunctions in the course of reading and/or further processing of the corresponding information. This applies to integrated circuits of all kinds.
In order to avoid these undesirable influences and associated malfunctions, in conventional circuit configurations filter devices are provided in the input section, which are intended to filter out and/or separate the corresponding interference signal spikes. This is achieved by correspondingly restricting the bandwidth of the electrical input signal. The filter circuits provided for this purpose take up an appreciable space in conventional circuit configurations. Moreover, the filter devices provided increase the transient recovery time of the actual receiver circuit in the input section of the circuit configuration. This leads to a poor performance of the entire circuit configuration.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a circuit configuration, in particular semiconductor circuit configuration, memory device, DRAM element or the like, which overcomes the above-mentioned disadvantages of the heretofore-known circuit configurations of this general type and in which the ingress and the transfer of an interference signal present in the input section of the circuit configuration can be suppressed using particularly space-saving devices and nonetheless reliably.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration, including:
a processing section;
an input section operatively connected to the processing section, the input section being configured to at least receive an electrical input signal fed to the input section and to transfer the electrical input signal to the processing section, the input section including a reception circuit, an input line device, and a transfer line device connected to the processing section;
a protection device formed in the transfer line device, the protection device including a processing circuit with a filter device and a frequency converter connected downstream of the filter device;
a feed line device connected to the protection device, the feed line device being at least configured to feed the electrical input signal from the input line device to the protection device;
the protection device being configured to analyze the electrical input signal with regard to interference signals present in the electrical input signal;
the filter device being configured to split off a given high-frequency component from the electrical input signal and to provide the given high-frequency component as a processing signal;
the frequency converter being configured to transform the given high-frequency component of the electrical input signal into at least one frequency range selected from the group consisting of a low-frequency range and an intermediate frequency band; and
the protection device being configured to prevent a transferring of the electrical input signal from the input section via the transfer line device to the processing section when interference signals are present in the electrical input signal.
In other words, according to the invention, the circuit configuration, in particular semiconductor circuit configuration, memory device, DRAM element or the like includes:
an input section, which is configured at least for receiving an electrical input signal that is fed in and for forwarding it to a processing section and which has, to that end, an input line device and also a reception circuit and a transfer line device toward the processing section;
a protection device formed in the transfer line device;
a feed line device, by which at least the electrical input signal can be fed to the protection device from the input line device, the protection device being able to analyze the electrical input signal with regard to interference signals contained therein; and
a processing circuit having a filter device, by which filter device a predetermined high-frequency component, in particular an RF component, can be split off from the electrical input signal and can be provided as a processing signal, in particular to an evaluation circuit, the processing circuit has a frequency converter or the like, the frequency converter is connected downstream of the filter device, through the use of the frequency converter a high-frequency component of the electrical input signal can be transformed, preferably shifted, into a low-frequency range, and/or into an intermediate frequency band, and when there are interference signals present in the electrical input signal, the protection device can prevent the transfer of the electrical input signal from the input section via the transfer line device to the processing section.
A generic circuit configuration, in particular semiconductor circuit configuration, memory device, DRAM element or the like, has an input section, which is configured at least for receiving an electrical input signal that is fed in and for forwarding it to a processing section provided in the circuit configuration and which has, to that end, an input line device and also a reception circuit and a transfer line device toward the processing section.
In the case of the circuit configuration according to the invention, a protection device is provided in the transfer line device. Furthermore, a feed line device is provided, by which at least the electrical input signal can be fed to the protection device from the input line device. According to the invention, the protection device is configured to analyze the electrical input signal with regard to interference signals contained therein and, when there are interference signals present in the electrical input signal, to prevent the transfer of the electrical input signal from the input section via the transfer line device toward the processing section.
A basic idea of the present invention is that, instead of a filter device formed in series with the reception circuit, preferably upstream thereof, a protection device is formed essentially in parallel therewith, in which protection device the electrical input signal can be analyzed with regard to possible interference signals. If there is an interference signal present in the electrical input signal and if it is evaluated as relevant, then the electrical input signal is prevented from being transferred from the input section via the transfer line device toward the processing section. Consequently, by virtue of the configuration according to the invention, space-consuming and complicated electronic filter elements are avoided in the circuit configuration and the input circuit is not delayed in terms of its response behavior and transient recovery behavior.
In order to realize the parallel processing of the electrical input signal, a preferred embodiment of the circuit configuration according to the invention provides for the protection device to have an analysis circuit, which is configured for analyzing the electrical input signal in parallel with the input circuit, and a transfer circuit, which is configured for the controllable transfer of the electrical input signal to the processing section in the transfer line device.
This means that the transfer circuit is fo
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Phung Anh
Stemer Werner H.
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