Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
2000-12-07
2003-02-04
Thomas, Tom (Department: 2811)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S017000, C438S401000
Reexamination Certificate
active
06514780
ABSTRACT:
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to an integrated circuit and to an appropriate manufacturing method.
To manufacture integrated circuits, exposure masks are used to structure photosensitive layers. The structured photosensitive layers then serve, by way of example, as etching barriers or to produce defined doping profiles in layers situated underneath in the integrated circuit that is to be manufactured. Particularly when manufacturing complex integrated circuits, a large number of exposure masks are required. In this case, all the exposure masks used to manufacture a particular integrated circuit are referred to as a related mask set.
During manufacture, masks from the mask set which are to be used are mixed up with other masks not belonging to the mask set. This happens particularly if an improved version of an already existing circuit is to be produced, since the mask set for the new circuit then differs only slightly from the mask set for the old circuit, and the number of masks to be used is also the same. If one of the masks from the mask set which is to be used currently is mixed up with one of the masks from the other mask set, this results in malfunctions during operation of the manufactured circuit, these malfunctions being detectable only with difficulty when the circuit is tested or being difficult to attribute to their cause of fault, namely the use of an incorrect mask.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an integrated circuit and a method for its manufacture which overcome the above-mentioned disadvantages of the prior art devices and methods of this general type, in which it possible to detect when masks used to manufacture the integrated circuits have been mixed up.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit containing a plurality of wiring planes. First structures are produced in the plurality of wiring planes using exposure masks. The first structures provide a particular functionality required by a user of the integrated circuit. Second structures are produced in the plurality of wiring planes using the exposure masks and do not serve for the particular functionality, but rather for checking if the exposure masks used belong to a common mask set.
According to the invention, in addition to the first structures that serve for producing a functionality required by the user of the circuit, the exposure masks are used to produce the second structures during the manufacture of the circuit. The second structures do not serve for the particular functionality of the circuit, but rather for the ability to check whether the exposure masks used belong to a common mask set. The second structures are disposed in a plurality of wiring planes in the integrated circuit. In this case, the first structures contain all the electrical structures ensuring the required functionality of the circuit. By way of example, the first structures may be parts of resistors, capacitors and/or transistors. By contrast, the second structures do not serve for the functionality required by the user of the circuit, but rather for checking whether the exposure masks used were the correct masks. Hence, the second structures serve the interests of the manufacturer of the integrated circuit, who is able to use the second structures to establish whether the manufactured circuit can actually work correctly because the correct exposure masks associated with the common mask set have been used.
In accordance with one embodiment of the invention, the second structures can be evaluated electrically, so that it is possible to establish whether the exposure masks used during manufacture were associated with the common mask set. Therefore, the second structures must be electrically conductive so that they can conduct measuring currents supplied to them, for example.
It is advantageous if the integrated circuit has an evaluation unit for evaluating the second structures and for producing a corresponding result signal. The result signal indicates whether the exposure masks used during manufacture belonged to the common mask set. Such an evaluation unit, which is integrated on the circuit, permits a self-test in the circuit to determine the correctness of the masks used during manufacture.
It is beneficial if the evaluation circuit uses the result signal to trigger a malfunction in the circuit if the exposure masks used for manufacture did not belong to the common mask set. The malfunction relates to the functionality which is required by the user of the circuit and which is ensured by the first structures. In this development of the invention, the evaluation circuit therefore intervenes in the functioning of the circuit that is performed by the first structures. If this particular malfunction occurs, the manufacturer of the circuit can then conclude that the evaluation unit has detected a fault in the masks used for manufacturing the circuit.
With the foregoing and other objects in view there is further provided, in accordance with the invention, a method for manufacturing the integrated circuit. The method includes providing a substrate having a plurality of wiring planedisposed therein. Exposure masks are used to produce first structures in the plurality of wiring planes. The first structures produce a particular functionality required by a user of the integrated circuit. The exposure masks are also used to produce second structures in the wiring planes. The second structures do not serve for the particular functionality, but rather for checking if the exposure masks used belonged to a common mask set.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit and a method for its manufacture, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Owens Douglas W.
Stemer Werner H.
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