MOSFET having double junction structures in each of source and d

Details MOSFET having double junction structures in each of source and d MOSFET having double junction structures in each of source and d

1997-06-13

1999-08-17

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257335, 257372, 257386, 257336, 257344, 257408, 257900, H01L 2972

Patent

active

059397519

ABSTRACT:
Disclosed is a MOSFET with double source and drain regions. Each of the source and drain regions in the MOSFET is implemented by two impurity-implanted regions. The source region has an n+ type region and a p type region which is formed beneath the n+ type region. The drain region has a p type region and an n+ type region which is formed beneath the p type region. Accordingly, the high built-in potential is induced in the source region and then the leakage current may decrease. On the other hand, because a current path is formed from the n+ type region in the source region to the n+ type region in the drain region, the hot carrier effect is reduced.

REFERENCES:
patent: 4851360 (1989-07-01), Haken et al.
patent: 5108935 (1992-04-01), Rodder
patent: 5264719 (1993-11-01), Beasom

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