Semiconductor IC device with transistors of different characteri

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257306, 257369, 257372, H01L 27108, H01L 27092

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active

059397438

ABSTRACT:
A DRAM semiconductor device has: a semiconductor substrate with one surface; a first well and a second well respectively formed in a first region and a second region in areas of the one surface of the semiconductor substrate, the first and second wells each having a local maximum of a first conductivity type impurity concentration at a depth position apart from the one surface of the semiconductor substrate, and one of a depth and the first conductivity type impurity concentration of the local maximum of the second well is larger than that of the first well, and the other is at least equal to that of the first well; a memory cell formed in the first well; and a peripheral circuit for the memory cell formed in the second well. A DRAM semiconductor device is provided whose refresh characteristics are improved without deteriorating other characteristics.

REFERENCES:
patent: 4907058 (1990-03-01), Sakai
patent: 5374838 (1994-12-01), Sawada et al.
patent: 5386135 (1995-01-01), Nakazato et al.
patent: 5404042 (1995-04-01), Okumura et al.
patent: 5428239 (1995-06-01), Okumura et al.
patent: 5514889 (1996-05-01), Cho et al.
Well Concentration: A Novel Scaling Limitation Factor Derived from DRAM Retention Time and its Modeling by T. Hamamoto et al., 0-7803-2700-4, IEEE 1995 (IEDM 95-915).

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