Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-06-23
2003-02-18
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S310000, C257S535000
Reexamination Certificate
active
06521927
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device comprising an array of memory cells in each of which a composite oxide film is used as the insulation film of an information storage capacitor and a method for the manufacture of the semiconductor device and, more particularly, a semiconductor device and a method for the manufacture of the semiconductor device, the semiconductor device being applied to a semiconductor integrated circuit including FRAM or DRAM and improved in respect of the protective structure—and the steps of forming the structure—for protecting the capacitor insulator film and the wiring in a ferroelectric memory (FRAM) comprising an array of memory cells each using an ferroelectric film as the capacitor insulation film or in a dynamic random access memory (DRAM) comprising an array of dynamic memory cells each using an ferromagnetic film as the capacitor insulator film.
Recently, attention is being drawn to a non-volatile ferroelectric memory cells (FRAM cells) using, as the inter-electrode insulation films, ferroelectric films composed of a material the perofskite structure or the lamellar perofskite structure and also to FRAM including an array consisting of the cells.
A ferroelectric film possesses the characteristic that the electric polarization once generated when an electric field is applied thereto remains even after the electric field ceases to be applied, and, when an electric field having an intensity higher than a certain value is applied, the direction of the electric polarization is reversed.
By paying attention to this polarization characteristic of this dielectric that the direction of the electric polarization thereof reverses, the technique of realizing FRAM cells by the use of ferroelectric for the insulator films of the information recording capacitors of the memory cells has been developed.
These FRAM cells are constituted in such a manner that the capacitors of the DRAM cells are replaced by ferroelectric capacitors and thus based on the method (data destructive read system) according to which, through the switching MOS transistors, the charges when the direction of the polarization is reversed or non-reversed are derived through the switching MOS transistors from the ferroelectric capacitors, and this system has the characteristic that, even if the operating power supply is turned off, the storage data written in the memory cells is not lost.
The FRAM has the feature, in view of the comparison thereof with the DRAM which is a representative of the large-capacity memories, that, since the FRAM is non-volatile, no refresh operation is needed for holding the data thereof, and no power is consumed during standby. Further, in view of the comparison of the FRAM with the flash memory which is another non-volatile memory, the FRAM has the feature that the frequency of data rewriting can be larger, and the data rewriting speed is markedly higher. Moreover, in view of the comparison thereof with the SRAM which is used for memory cards etc. and can be backed up by battery, the FRAM has the feature that the power consumption thereof is smaller, and the cell area can be decreased to a substantial degree.
The FRAM which has features as mentioned above are expected much connection with the replacement thereby of the existing DRAM, flash memory and SRAM, the application thereof to logic hybrid devices, etc. Further, the FRAM can operate at high speed without the use of a battery and, therefore, the development thereof into non-contact cards such as RF-ID: Radio Frequency-Identification etc, is being started.
As mentioned above, the FRAM cell can operate at high speed and yet with a low power consumption and, thus, is expected to be integrated at a high degree of integration. Thus, the reduction in area of the memory cell and a manufacturing process accompanied by a reduced deterioration of the ferromagnetic need to be examined. Further, the multi-layer wiring technique which is indispensably necessary in case of mounting the existing FRAM device compositely with other devices and for realization of a high-degree integration thereof has not been established yet at present.
The reason why it is difficult for semiconductor integrated circuits with FRAM devices mounted thereon to be realized in a multi-layer wiring structure lies in the fact that the ferroelectric material is very weak to a reducing atmosphere (particularly, a hydrogen atmosphere). Most of the existing LSI processes are of the type in which hydrogen is mixed in, which gives a serious problem to the manufacture of FRAM.
That is, according to the conventional technique of forming FRAM cells, as shown in, e.g.
FIG. 1
, after an element isolation region
102
is formed in a silicon substrate
101
, a gate insulation film
103
is formed, a gate electrode
104
, a gate protecting insulation film
105
, and drain-source regions (diffused layer regions)
106
and
107
are successively formed, whereby a pass transistor (switching MOS transistor) is formed. Thereafter, a BPSG film
201
or the like is deposited and flattened, and, on the upper layer thereof, a lower electrode
401
, a ferroelectric film
402
and an upper electrode
402
are deposited in this order and subjected to patterning, respectively, to dispose a ferroelectric capacitor, on the upper layer thereof, an insulation film (such as, e.g. plasma TEOS)
207
is deposited, through a contact hole bored in the insulation film
207
and the BPSG film
201
, a local wiring
301
is provided, further, on the upper layer thereof, an insulation film
203
is deposited, and through contact holes bored in this insulation film
203
etc., metal wirings
302
and
303
are provided, after which a passivation film is provided for protection.
Here, as the ferroelectric of the FRAM cell capacitor, there are used oxides containing the perofskite structure such as PZT (Pb (Zr, Ti) O
3
, lead zirconate titanate), SBT (SrBi
2
Ta
2
O
9
: strontium bismuth tantalum), BIT (Bi
4
Ti
3
O
12
), etc. or such oxides which have each been partially replaced by a substitute element.
Further, generally in case PZT or SBT is used as the ferroelectric material, a rare metal or an electrically conductive oxide such as Pt (platinum), Ir, Ir oxide (IrO
2
), Ru, Ru oxide (RuO
2
), LaSrCo oxide (LSCO) or the like. is used as the electrode material of the ferroelectric capacitor.
As described above, in case of forming the ferroelectric capacitor, generally the lower electrode is formed by the use of Pt, and thereafter, the ferroelectric thin-film is formed, in which case, when the ferroelectric thin-film is formed and crystallized, a high-temperature oxygen annealing is needed.
Here, in case PZT is used as the ferroelectric material, the capacitor characteristics are deteriorated by the occurrence of a defect due to the diffusion of Pb in the PZT in case the oxidation is insufficient. The oxygen annealing temperature necessary to effect a sufficient oxidation so as to avoid the above-mentioned deterioration is ordinarily 600° C. to 700° C.
Further, in case a bismuth lamellar compound such as SBT or the like is used as the ferroelectric material, the necessary oxygen annealing temperature is ordinarily so high as 800° C.
However, in case of the structure in which the lower electrode (such as, e.g. Pt) of the ferroelectric capacitor and the transfer gate (pass transistor) are connected to each other by means of a polycrystalline silicon plug, there arises the problem that, when the oxygen annealing of a high temperature as mentioned above is performed, the lower electrode composed of Pt reacts with the polycrystalline silicon plug into a silicide or the problem that the polycrystalline silicon plug is oxidized.
On the other hand, in case of the structure in which the upper electrode of the ferroelectric capacitor and the transfer gate are connected to each other directly by a local electrode wiring comprising a buried contact, it becomes difficult to form the local electrode wiring for directly connecting the upper electrode and the pas
Arai Norihisa
Hidaka Osamu
Kanaya Hiroyuki
Katata Tomio
Mochizuki Hiroshi
Crane Sara
Kabushiki Kaisha Toshiba
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