Cyclic trellis-coded modulation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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C714S786000, C714S795000, C375S265000, C375S341000

Reexamination Certificate

active

06578173

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to digital communication systems, and, in particular, to forward error correction through trellis coded modulation.
BRIEF DESCRIPTION OF THE RELATED ART
In recent years, much of the research and development in the communications industry has been concentrated in the area of digital signal transmission. As is well known in the art, digital signal transmission typically involves transmission of data with a carrier frequency. The carrier frequency is modulated by data so that a frequency bandwidth is occupied by the transmitted signal. The growing demand for access to data and communication services has placed a significant strain on the available bandwidth. Moreover, there is an ever increasing demand for increased data communication rates for the purpose of decreasing the data transmission time. An increase of the rate of the data typically results in an increased bandwidth requirement, placing a further strain upon the available bandwidth for transmission of signals.
In an effort to increase the data rates without sacrificing the available bandwidth, a number of increasingly sophisticated coded modulation schemes have been developed. For example, quadrature amplitude modulation (QAM) employs both amplitude and phase modulation in order to encode more data within a given frequency bandwidth. Another modulation technique involves multiple phase shift keying (MPSK) to increase data capacity within a given bandwidth. These high level modulation schemes are very sensitive to channel impairments. That is, the information encoded by means of such techniques is often lost during transmission due to noise, Rayleigh fading and other factors which are introduced over the communication medium.
In order to compensate for the increased sensitivity of these high level modulation schemes, various forward error correction coding techniques are employed. One such error coding technique is trellis coded modulation. Trellis coded modulation is desirable since it combines modulation and error coding operations to provide effective error control coding without sacrificing power and bandwidth efficiency. Furthermore, it has been shown that trellis coded modulation schemes perform significantly better than their uncoded equivalents with the same power and bandwidth efficiency. Trellis codes have been developed for many of the high-level, high-rate modulation schemes, including well-known 8-PSK modulation and Square 16 QAM modulation. However, designers of past systems have not considered providing a technique of trellis coding which applies to any phase and/or amplitude modulation scheme, as well as codes having various constraint lengths, while providing optimal or near optimal error performance.
Typically, a new set of “optimal” trellis codes must be found individually for each modulation scheme. The “optimal” trellis codes are typically found through algorithms that search all the possible trellis code structures that have simple feedback of feed-forward shift register implementations. Even a small change in system parameters, such as code constraint length, requires a search for an entirely new set of trellis codes.
SUMMARY OF THE INVENTION
The present invention provides a system and method for trellis-coded modulation and demodulation of phase and/or amplitude modulated signals complying with varying signal constellations and constraint lengths, while yielding optimum or near optimum error performance. The cyclic trellis encoding method of the present invention can generate a family of trellis codes whose performance is better than or equal to so called “optimal” codes generated by other techniques. Generally, the cyclic trellis codes do not have a feed-forward or feed-back shift register implementation.
A method of cyclic trellis encoding a data sequence within an encoder is disclosed. The data sequence is to be mapped according to a predetermined modulation scheme having an associated signal constellation. The signal constellation has defined coordinate points corresponding to phase and amplitude characteristics corresponding to output symbols from the encoder. The method comprises the step of defining an output table of output symbols. The output table has present state rows and input symbol columns. The output symbols are determined as a function of symbols input to the encoder and a present state of the encoder. The method of the present invention further comprises the step of defining the output table, which further comprises the substeps of assigning each of the output symbols to the points of the signal constellation; partitioning the points of the signal constellation into a first subset of output symbols and a second subset of output symbols; loading even ones of the present state rows with output symbols from the first subset; and loading odd ones of the present state rows with output symbols from the second subset. The method further comprises the step of defining a next-state table of next states for the encoder. The next-state table has present state rows and input symbol columns, wherein the next states are defined as a function of symbols input to the encoder and a present state of the encoder. The method further comprises the step of defining the next-state look-up table, which further comprises the substeps of loading first ones of the present state rows with next states of the encoder until at least one of the first present state rows is full and all of the next state values have been used; and loading other ones of the present state rows with next states that are cyclicly shifted from the next states in each of the first ones of the present state rows until all of the present state rows are filled. The method of the present invention further comprises the step of implementing the output and next-state tables within the encoder so that output symbols from the encoder are determined by input symbols to the encoder and the present state of the encoder in accordance with the output table, and transitions from the present state of the encoder to the next state of the encoder are performed in accordance with the next-state table. Finally, the method comprises the step of mapping the output symbols into signals having phase and amplitude characteristics corresponding to points on the signal constellation.
In a preferred embodiment of the present invention, the coordinate points of the signal constellation are assigned output symbols according to natural mapping techniques when the predominant channel interference is Additive White Gaussian Noise.
In another preferred embodiment the coordinate points of the signal constellation are assigned to output symbols according to Gray coding techniques when the predominant channel interference is Rayleigh fading.
In another embodiment of the present invention, a method of cyclic trellis encoding an input data sequence with an encoder is disclosed. The input data sequence is to be mapped according to a predetermined modulation scheme having an associated signal constellation. The signal constellation has defined coordinate points corresponding to phase and amplitude characteristics of output symbols from the encoder. The encoder receives n inputs, corresponding to 2
n
input values, and outputs n+1 outputs corresponding to 2
n+1
output values. The encoder has 2
k
possible states. The method of the present invention comprises the steps of defining an output table having 2
k
present state rows and 2
n
input symbol columns, wherein the output symbols from the encoder are determined as a function of input symbols to the encoder and a present state of the encoder; defining the output table which further comprises the substeps of assigning values to the points of the signal constellation, where the values correspond to the output symbols; partitioning the signal constellation into a first subset of 2
n
output symbols and a second subset of 2
n
output symbols, where the first subset and second subset are symmetric; loading even ones of the present state rows with values correspondi

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