Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2001-05-23
2003-10-28
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C174S261000, C174S262000, C361S736000, C361S792000, C714S724000, C714S726000
Reexamination Certificate
active
06640332
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to methods for determining a wiring pattern on a multi-layer printed wiring board and more particularly, to a method for determining a suitable wiring pattern which is used when the operational frequency of a circuit on a multi-layer printed wiring board is high, and also relates to a multi-layer printed wiring board manufactured by the method.
In order to operate a circuit on a printed wiring board as desired, wiring has conventionally been carried out so that a wiring length is in an allowable range determined by the operational timing, etc. of the circuit.
However, in the case of a recent printed wiring board having a high operational frequency of a circuit thereon, problems with delay and reflection caused in a signal line become non-negligible, which requires the signal line to be treated as a transmission line.
More specifically, when the circuit has a low operational frequency, the amounts of such delay and reflection as mentioned above are smaller than its operational speed. For this reason, these influences were able to be ignored and thus an electrical length corresponding to the substantial length of the signal line was regarded as equal to the wiring length of the signal line without any problems. When the operational frequency becomes higher, however, these influences become non-negligible, which means the wiring length and the electrical “length” of the signal line must be separately considered.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method for wiring a multi-layer printed wiring board in such a manner that an electrical length of a signal line is accurately calculated and satisfies a given electrical length constraint, and also to provide a multi-layer printed wiring board manufactured by the method.
The above object is attained by providing a method for wiring a multi-layer printed wiring board which includes steps of providing an electrical length constraint which a signal line must satisfy, determining an electrical length change of the signal line at a discontinuous delay part thereof, calculating an electrical length of the signal line with use of a wiring length of the signal line and the determined electrical length change, and determining a wiring route in such a manner that the signal line satisfies the electrical length constraint.
It is also desirable that the step of determining an electrical length change include a step of determining an electrical length change to a bend angle between straight parts (which will be referred to as the wiring elements, hereinafter) of a wiring pattern and an electrical length change to thru and via holes.
In accordance with the present invention, there can be obtained a desired wiring pattern whose electrical length is suitably and accurately constrained. As a result, there can be realized a multi-layer printed wiring board which can mount a circuit having a high operational frequency thereon.
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patent: 5550748 (1996-08-01), Xiong
patent: 5889677 (1999-03-01), Yasuda et al.
patent: 6301686 (2001-10-01), Kikuchi et al.
patent: 6359237 (2002-03-01), Tohya et al.
patent: 07-240600 (1995-09-01), None
patent: 08-320894 (1996-12-01), None
Itoh Katsuyuki
Mitome Hiroyuki
Hitachi , Ltd.
Rossoshek Y
Smith Matthew
Townsend and Townsend / and Crew LLP
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