Semiconductor memory device comprising two kinds of memory cells

Details Semiconductor memory device comprising two kinds of memory cells Semiconductor memory device comprising two kinds of memory cells

1995-06-06

1997-09-02

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Capacitors

365154, 36523003, 365222, 36523002, 36523004, 36518508, G11C 1124

Patent

active

056639058

ABSTRACT:
A semiconductor memory device comprises a dynamic memory cell array, a static memory cell array, a plurality of word lines, a plurality of DRAM bit line pairs and a plurality of SRAM bit line pairs. The dynamic memory cell array comprises a plurality of dynamic memory cells arranged in the shape of a matrix. The static memory cell array is arranged adjacent to the dynamic memory cell array. The static memory cell array includes the static memory cells arranged in the shape of a matrix. A plurality of word lines are arranged in a plurality of rows. Each word line is connected to the dynamic and static memory cells arranged in the corresponding rows. A plurality of DRAM bit line pairs are arranged in a plurality of columns. Each DRAM bit line pair is connected to the dynamic memory cells. A plurality of SRAM bit line pairs are arranged in the other plurality of columns. Each SRAM bit line pair is connected to the static memory cells arranged in the corresponding columns.

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patent: 5249282 (1993-09-01), Segers
"Digital Integrated Electronics", Taub and Schilling, 1977, McGraw-Hill, pp. 450-451.
Design of CMOS Ultra-LSI, pp. 155-166, Apr. 1989, Baifukan Publishing Co., Ltd.

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