Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-09-30
2003-11-25
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C707S793000, C707S793000, C711S162000
Reexamination Certificate
active
06654288
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and a device for backing up data in a non-volatile memory module and a memory module, the data being stored multiple times in the memory module.
BACKGROUND INFORMATION
A method of recording data and programs in at least one first memory of a computer system is known from German Published Patent Application No. 198 39 680. In that method the programs are divided into at least first programs and second programs. In addition to the first memory at least one second memory is utilized, a defined division into memory areas being stipulated. The data is backed up in the memory areas through the feature that a backup copy is created in at least one of the at least two memories before the data and programs are deleted, copied, or read in. Upon successful programming this backup copy is either deleted or reused as an original; in other words, it does not need to be permanently stored or newly recorded from outside.
Many different methods are known for recognizing data errors, for example in the event of faulty saving or programming operations. For this purpose the data needs to be represented in an error code or error recognition code. Such information may for example be parity bits which allow error recognition through the creation of checksums, for use in odd parity checking and/or even parity checking, for example.
Other check methods which can be executed linearly and/or cyclically are known, such as the Hemming code, the BCH code (Boise, Chandhuri, Hocquenghem), and the Abramsen code. Another member of this group of checking methods is also the cyclic redundancy check (CRC) in which check bytes are created on each block by the CRC method from the data, except for the information to be deleted or copied or read in, these check bytes being processed or recorded together with that information. However, generally the memory capacity needed for these check bytes or check bits is very high.
In these methods it is generally not guaranteed that either immediate data losses or gradual data losses in a non-volatile memory module can be recognized and corrected; in other words, while the previously known methods are able to recognize, for example, gradual data losses, such as bit upsets, they are generally unable to correct them.
The object of the present invention is thus based on optimizing the situation described above, in particular to recognize and to correct both immediate data losses and also gradual data losses in a non-volatile memory module.
SUMMARY OF THE INVENTION
The present invention relates to a method and a device for backing up data in a non-volatile memory module and a corresponding memory module, the data being stored multiple times in the memory module and the data being backed up using at least one check identifier such that the check identifier and a bit-by-bit content of the data are correlated, at least one validity identifier stipulating which of the data stored multiple times is readable and may thus be read out. In this system it is advantageous if in addition to the data the particular check identifiers belonging to the data and the particular validity identifiers belonging to the data are also stored multiple times in the memory module and assigned to the corresponding data, the backup of the data further being advantageously performed through the feature that at least the data stored multiple times in the memory module is logically linked bit-by-bit when read out.
The data is advantageously assigned an OR function at the bit level when read out through which bit upsets, in other words gradual data losses, may be prevented or corrected.
Here it is advantageous that data which has been incompletely or erroneously stored is recognized on the basis of the at least one check identifier and/or on the basis of the at least one validity identifier, other complete and error-free data from the redundant and multiply stored data then being read out.
It is also advantageous if a first and a second validity identifier are used, the first validity identifier indicating whether the data assigned to this validity identifier may be read out, i.e., is valid, and the second validity identifier specifying whether the data may be stored in an area of the memory module such that the data present in this area may be replaced; in other words, the data already present is obsolete.
Here it is expedient if at least one validity identifier is set to a first value before the data is stored in the memory module and to a second value after the data has been stored completely, the first value and the second value differing by more than one bit and with a check of the validity identifier determining only whether the value is unequal to, and in particular greater than, the first value. This has the advantage that individual bit upsets or individual data losses with regard to the validity identifier have no negative impacts on the result of the check.
In this way through the method of the device and the memory module both immediate data losses, such as interruptions in recording, and gradual data losses, such as bit upsets, are advantageously recognized and corrected.
In particular, the memory module according to the present invention is not volatile, the data being storable electrically or optically or magnetically, and the memory module being formed in such a way that data may be rewritten to it electrically or optically or magnetically.
REFERENCES:
patent: 5694538 (1997-12-01), Okazaki et al.
patent: 6092086 (2000-07-01), Martin et al.
patent: 6460055 (2002-10-01), Midgley et al.
patent: 6529976 (2003-03-01), Fukuzawa et al.
patent: 6546474 (2003-04-01), Weigelt
patent: 198 39 680 (1998-09-01), None
patent: 0 919 967 (1998-09-01), None
patent: 0 990 989 (1999-09-01), None
Dinh Son T.
Robert & Bosch GmbH
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