Semiconductor device having a dual damascene interconnect...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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C257S751000, C257S760000

Reexamination Certificate

active

06661094

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor devices that include dual damascene interconnects and methods for making them.
BACKGROUND OF THE INVENTION
Dual damascene interconnects may enable reliable low cost production of integrated circuits using sub 0.25 micron process technology. As device features shrink, however, the distance between conductive lines decreases, creating the need for a dielectric with a lower dielectric constant. Certain low-k materials have been proposed, including various carbon containing materials, e.g., organic polymers and carbon doped oxides. Although such materials may serve to lower the dielectric constant, they may offer inferior mechanical properties, such as poor mechanical strength or susceptibility to cracking.
Accordingly, there is a need for a semiconductor device that includes a dual damascene interconnect in which the dielectric that insulates adjacent conductive lines has both a low dielectric constant and acceptable mechanical characteristics. In addition, there is a need for a process for making such a device. The present invention provides such a semiconductor device and a process for making it.


REFERENCES:
patent: 5510645 (1996-04-01), Fitch et al.
patent: 5567982 (1996-10-01), Bartelink
patent: 5882963 (1999-03-01), Kerber et al.
patent: 5949143 (1999-09-01), Bang
patent: 6153511 (2000-11-01), Watatani
patent: 6218302 (2001-04-01), Braeckelmann et al.
patent: 6333255 (2001-12-01), Sekiguchi
patent: 6359328 (2002-03-01), Dubin

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