Trench semiconductor devices

Details Trench semiconductor devices Trench semiconductor devices

2002-02-07

2003-08-12

Wilson, Allan R. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With electrical contact in hole in semiconductor

C257S622000

Reexamination Certificate

active

06605862

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to semiconductor devices having a p-n junction between a first device region of one conductivity type and an underlying voltage-sustaining zone, and having trenched field-shaping regions that extend through the voltage-sustaining zone. Such devices may be, for example, a PN diode rectifier or an insulated-gate field-effect device (often termed MOSFET).
Many known types of semiconductor device comprise a semiconductor body in which a p-n junction is formed between a first device region of one conductivity type and an underlying voltage-sustaining zone. Field-effect transistors, for example power MOSFETs, are one specific type having the voltage-sustaining zone as a drain drift region of the transistor. Power rectifier PiN diodes are another specific type, in which the voltage-sustaining zone is a lower-doped intermediate region between anode (P) and cathode (N) regions.
Published German patent application DE-A-198 48 828 and the PCT published patent applications WO 01/59844, WO 01/59847 and WO 01/59846, (our refs. PHNL000065; PHNL000066; PHNL000067) disclose the incorporation into such devices of trenched field-shaping regions that extend in trenches through the voltage-sustaining zone to an underlying second device region; the trenches extend from an upper surface of the body through the first device region and the voltage-sustaining zone. The trench accommodates a resistive path of semi-insulating material that is connected between the second device region and a device electrode that contacts the first device region. The voltage-sustaining zone is so dimensioned and doped between the trenched field-shaping regions as to be depleted of free charge carriers between the trenched field-shaping regions in a voltage-blocking mode of operation, by the spread of a depletion layer from the p-n junction.
In some embodiments, an insulating layer is present at side-walls of the trench to dielectrically couple potential from the resistive path to the voltage-sustaining region. In all the depicted embodiments (except for FIGS. 4 and 5 of DE-A-198 48 828) the semi-insulating material extends through the whole depth of the trench, and so also does the insulating layer when present at the side-walls. As a consequence, in all the embodiments that have an insulating layer at side-walls of the trench, the p-n junction is depicted as extending laterally to the insulating layer.
FIGS. 4 and 5 of DE-A-198 48 828 depict MOSFETs, in which it is generally desired to short-circuit the transistor body region (channel region) to the source electrode that contacts the source region. This is achieved in the upper part of the trench in the MOSFETs of FIGS. 4 and 5 of DE-A-198 48 828. Thus, the semi-insulating material 7 (FIGS. 4 and 5) and the insulating layer 13 (present in FIG. 4) are removed from the upper part of the trench so as to expose the transistor body region (channel region 12). This removal permits the source electrode 10 to extend into the upper part of the trench to contact both the source region 11 and the transistor body region 12. A consequence of this form of short-circuit is that the resistive path now starts below the level of the upper surface of the body. Another consequence of this form of short-circuit is that when an insulating layer (13 in FIG. 4) is present, this insulating layer is removed to at least the same level as the semi-insulating material 7. This is illustrated in FIG. 4 of DE-A-198 48 828.
The incorporation of trenched field-shaping regions enables desired voltage-sustaining, voltage-blocking, breakdown voltage characteristics of the devices to be obtained using for the voltage-sustaining zone a semiconductor region (or interposed semiconductor regions) that has (or have) a higher dopant concentration, and thus lower resistivity, than would conventionally be required by a conventional square law relationship between breakdown voltage and series resistivity. These devices are a modification of those disclosed in U.S. Pat. No. 4,754,310 (our reference PHB32740). The whole contents of U.S. Pat. No. 4,754,310, DE-A-198 48 828, WO 01/59844, WO 01/59846 and WO 01/59847 are hereby incorporated herein as reference material.
SUMMARY OF THE INVENTION
It is an aim of the present invention to modify the design parameters for trenched field-shaping regions in such a way as to improve the electric field distribution in the adjacent voltage-sustaining zone.
According to one aspect of the present invention, there is provided a semiconductor device having a p-n junction between a first device region of one conductivity type and an underlying voltage-sustaining zone, wherein
the first device extends laterally to an insulating layer at side-walls of a trench that accommodates a resistive path of a trenched field-shaping region extending through the voltage-sustaining zone,
the insulating layer dielectrically couples potential from the resistive path to the voltage-sustaining zone that is depleted in a voltage-blocking mode of operation of the device,
the insulating layer extends at the side-walls of the trench to an upper level that is higher than a lower level at which the resistive path starts in the trench, which lower level is more closely aligned to the depth of the p-n junction in the body and is protected by the insulating layer.
Such a construction (with its respective upper and lower levels for the insulating layer and the resistive path) enables the electric field distribution in the voltage-sustaining zone to be improved by more closely aligning the start of the potential drop along the resistive path (within the trench) with the p-n junction depth (outside the trench). As such, a more optimum electric field distribution can be achieved in the depleted voltage-sustaining zone in the voltage-blocking mode of operation of the device, so better optimising its breakdown voltage.
In the MOSFETs of FIGS. 4 and 5 of DE-A-198 48 828, the level at which the resistive path starts is determined by the depth of the p-n junction between the source region and the transistor body region. By contrast therewith, the level (lower level) at which the resistive path starts in a MOSFET in accordance with the present invention is determined by the depth of the p-n junction between the transistor body region and the drain drift region (voltage-sustaining zone). Because the insulating layer extends to a higher level, the lower level (at which the resistive path starts) can be aligned very closely to the p-n junction with the voltage-sustaining zone. This close alignment is possible without risking a high leakage current, the magnitude of which might otherwise vary depending upon the alignment tolerances in any given manufacturing process. Indeed, the lower level at which the resistive path starts may even be slightly below the level at which the p-n junction may meet the insulating layer. Thus, a termination of the p-n junction at the side wall of the trench can remain protected by the insulating layer extending to the higher level.


REFERENCES:
patent: 4754310 (1988-06-01), Coe
patent: 4933739 (1990-06-01), Harari
patent: 5895951 (1999-04-01), So et al.
patent: 6184565 (2001-02-01), Beasom
patent: 19848828 (2000-05-01), None
patent: WO0159844 (2001-08-01), None
patent: WO0159846 (2001-08-01), None

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