Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-01-25
2003-06-10
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S446000, C257S452000, C250S208100, C250S214100
Reexamination Certificate
active
06576940
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having a solid state image sensing device and a manufacturing method thereof.
2. Description of the Background Art
In recent years, a solid state image sensing device using an amplification-type sensor has been proposed as one type of solid state image sensing devices. This device features that a light signal detected by a photoelectric transfer storage section is amplified in the proximity of the photoelectric transfer storage section.
FIG. 22
is a drawing that shows a circuit construction of a CMOS-type (Complementary Metal Oxide Semiconductor) image sensor serving as a solid state image sensing device. As illustrated in
FIG. 22
, unit pixels or unit cells C are arranged in a matrix format, and each of the cells C is connected to a vertical shift register and a horizontal shift register.
Each of the unit cells C has a photodiode PD, a transfer switch M
1
, a reset switch M
2
, an amplifier M
3
and a selection switch M
4
. The photodiode PD transfers incident light to an electric signal. The transfer switch M
1
, which is controlled by a signal sent from the vertical shift register, transfers the electric signal thus transferred to the amplifier M
3
. The reset switch M
2
resets a signal charge, and the amplifier M
3
amplifies the electric signal.
Here, the transfer switch M
1
, the reset switch M
2
, the amplifier M
3
and the selection switch M
4
are respectively constituted by MOS transistors.
For example, U.S. Pat. No. 5,898,196 discloses a specific construction of such a solid state image sensing device.
FIG. 23
is a schematic cross-sectional view that shows the construction of a semiconductor device having the solid state image sensing device disclosed in U.S. Pat. No. 5,898,196. As illustrated in
FIG. 23
, a photodiode PD and a transfer switch M
1
constituting the solid state image sensing device are shown in a pixel region, and a transistor Tn, etc. constituting peripheral circuits such as vertical and horizontal shift registers are shown in a logic region.
A p
−
impurity region
102
and p
+
impurity region
102
a
are formed on a p
+
region
101
, and both of the solid state image sensing device and the peripheral circuit device are formed in the p
−
impurity region
102
.
The photodiode PD in the pixel region is constituted by the p
−
impurity region
102
and an n
−
impurity region
104
. A p
+
impurity region
105
is formed on the upper portion of the n
−
impurity region
104
.
The transfer switch M
1
is provided with an n
−
source region
104
, an n
+
drain (FD) region
106
and a gate electrode layer
108
. The n
−
source region
104
and the n
+
drain region
106
are formed with a predetermined distance. The gate electrode layer
108
is formed on an region sandwiched by the n
−
source region
104
and the n
+
drain region
106
through a gate insulation layer
107
. Here, the n
−
impurity region
104
of the photodiode PD and the n
−
source region
104
of the transfer switch M
1
are constituted by the same impurity region.
The MOS transistor Tn in the logic region is provided with a pair of n
+
source/drain regions
122
and a gate electrode layer
124
. The pair of n
+
source/drain regions are formed with a predetermined distance in between. The gate electrode layer
124
is formed on an region sandwiched by the pair of n
+
source/drain regions through a gate insulation layer
123
.
The pixel region and the logic region are electrically separated by a separation region
103
formed on the surface of the semiconductor substrate
101
.
In the above-mentioned construction of
FIG. 23
, the p
−
impurity region
102
in which the pixel cell is formed and the p
−
impurity region
102
in which the peripheral circuit element is formed are integrally formed. This construction has raised a problem of degradation in the pixel characteristic (SIN ratio) of the pixel cell. A detailed explanation will be given of this problem.
As illustrated in
FIG. 23
, in the MOS transistor Tn of the logic region, when the gate length (that is, the channel length) is shortened with the voltage between the drain and source being constant, the electric field inside a void layer located at a drain end portion of a channel becomes extremely great. As a result, an avalanche phenomenon in which electrons are accelerated to high speeds, and collide with atoms to generate electrons and positive holes in a manner like an avalanche takes place. One portion of a charge such as a hot carrier caused by this phenomenon is dispersed inside the p
−
impurity region
102
. At this time, in the case when the p
−
impurity regions
102
of the pixel region and the logic region are integrally formed, the charge such as a hot carrier easily invade the pixel region. As a result, the charge such as a hot carrier forms a noise component, thereby causing degradation in the pixel characteristic (SIN ratio).
Here, supposing that the generation of charge in the photodiode PD portion is Q
P
and the capacity in the FD portion is C
FD
, the output voltage Vout is represented by Vout=Q
P
/C
FD
.
When the above-mentioned noise component Q
1
exists, the corresponding error &Dgr;Vout=Q
1
/F
FD
is generated. Consequently, in the case of no light irradiation, Vout (noise) is increased by the value corresponding to &Dgr;Vout, with the result that the sensitivity as the solid state image sensing device, that is, the S/N ratio, is lowered.
Moreover, at the time when the substrate is transported or when the substrate is wet-etched, transition metals, such as Cr, Fe, Ni, Co, etc., or heavy metals such as Cu, Au, etc., tend to adhere to the vicinity of the surface of the substrate, or minute defects such as deposition of oxides tend to be produced. In this case, these transition metals, heavy metals, minute defects, etc. easily invade from the logic region to the pixel region, causing a leak current and resulting in degradation in the pixel characteristic (S/N ratio).
SUMMARY OF THE INVENTION
The present invention has been devised to solve the above-mentioned problems, and its objective is to provide a semiconductor device having a solid state image sensing device and a manufacturing method thereof, which can improve the pixel characteristic by preventing a hot carrier, transition metals, etc. from invading from a peripheral circuit region to a pixel region.
The semiconductor device having a solid state image sensing device of the present invention is provided with a semiconductor substrate, first and second well regions, a plurality of unit cells and a peripheral circuit element. The semiconductor substrate is a first conductive type, and has a main surface. The first and second well regions are a second conductive type, and formed on the main surface of the semiconductor substrate. Each of the unit cells is formed on the first well region, and is provided with a photoelectric transfer element for transferring light to an electric signal. The peripheral circuit element, which is formed on the second well region, is used for controlling the unit cells. The first well region is surrounded by a region of the first conductive type on the periphery thereof so as to be separated from the second well region.
In accordance with the semiconductor device having a solid state image sensing device of the present invention, the first well region in which a plurality of unit cells are formed and the second well region in which a peripheral circuit element is formed are separated from each other; therefore, it is possible to limit a hot carrier caused in the peripheral circuit element from invading the first well region. Moreover, it is also possible to limit transition metals, heavy metals and minute defects in the second well region from invading the first well region. For this reason, it is possible to reduce noise components from the photoelectric tr
Fourson George
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Pham Thanh V
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