Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2001-11-28
2003-08-12
Ray, Gopal C. (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S316000, C709S249000, C370S401000
Reexamination Certificate
active
06606679
ABSTRACT:
BACKGROUND
1. Field
The subject matter disclosed herein relates to processing platforms. In particular, the subject matter disclosed herein relates to processing platforms comprising input/output (I/O) devices.
2. Information
Processing platforms typically comprise a host processing system, peripheral devices and an
1
/O system that enables communication between processes hosted on the host processing system and the peripheral devices. Such an I/O system is typically formed according to one or more standard I/O architectures such as, for example, the peripheral components interconnect (PCI) architecture according to the PCI Local Bus Specification, Rev. 2.2, Dec. 18, 1998, which is promoted by the PCI Special Interest Group.
To allocate resources to communicate with peripheral devices through an I/O system, a host processing system typically executes an enumeration procedure. An enumeration procedure typically polls elements of the I/O system and peripheral devices according to a protocol to extract identification information and resource requirements. The enumeration procedure may then allocate resources by, for example, allocating a portion of system memory for use by peripheral controllers and device drivers, and establishing data buffers in a system memory of the host processing system.
As requirements of future processing platform architectures evolve, the architectures of complementary I/O systems will evolve, enabling increased performance and functionality to meet these requirements of the future processing platform architectures. Nevertheless, there is a desire to maintain commonality between newer I/O system architectures and legacy I/O systems to allow for graceful transitions to the newer I/O system architectures.
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Schaefer Joseph A.
Solomon Gary A.
Intel Corporation
Nagy Paul G.
Ray Gopal C.
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