Programmable drive strength output buffer with slew rate control

Details Programmable drive strength output buffer with slew rate control Programmable drive strength output buffer with slew rate control

1996-07-01

1997-09-02

Westin, Edward P.

Electronic digital logic circuitry

Interface

Current driving

326 81, 326 50, 326 33, 326 27, H03K 1730, H03K 1902

Patent

active

056636644

ABSTRACT:
A programmable drive strength buffer includes a control signal used to enable/disable an output drive transistor slew rate control circuit, and a current drive strength control bits which are used to select weak, medium or strong current drive capability over an ISA bus with loads varying from 60 pF to 240 pF for a supply voltage of 5.0 or 3.3 volts.

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patent: 5321319 (1994-06-01), Mahood
patent: 5341040 (1994-08-01), Garverick et al.

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