Static information storage and retrieval – Systems using particular element – Semiconductive
Reexamination Certificate
2001-10-16
2003-08-12
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Systems using particular element
Semiconductive
C365S042000, C365S104000
Reexamination Certificate
active
06606264
ABSTRACT:
One of the ways to implement a programmable feature on an integrated circuit is by utilizing fuses or antifuses. Fuses are selectively electrically programmed by applying a program voltage which opens a circuit between two conductive terminals of the fuse. For laser fuses, a laser is used to cut a fuse link. An antifuse is electrically programmed by applying a programming voltage to break down dielectric material connected to two conductive terminals of the antifuse.
The programming voltage permanently changes either the fuse or antifuse to provide a high or low resistance in accordance with the programming. In the case of an antifuse, the high resistance is typically a program resistance on the order of hundreds of thousand ohms.
The programming voltage for a fuse or antifuse is typically quite high, for example, over 8 volts. This high voltage must be routed to selective fuse or antifuse elements on an integrated circuitry without affecting other highly sensitive lower voltage signal paths. Accordingly, the introduction of high fuse or antifuse programming voltages requires careful design and process modifications, such as tailored junction profiles or thick gate oxides in order to avoid damage to other sensitive components on the integrated circuit die. This increases fabrication complexity as well as chip size.
A programmable circuit which relies on a lower programming voltage and decreased die area for the programmable element would be desirable.
Also, in the testing of DRAM memory devices utilizing boosted wordline voltages, a Vt shift of several hundred millivolts has inadvertently been produced in small n-channel transistors in the memory array. This causes the affected memory cells to be inferior since the data to be stored in the cell is not as readily transferred through the affected n-channel access device. To avoid this detrimental effect, device manufacturing processes have been modified. This invention utilizes this effect which is detrimental to the memory array, for an improved programmable circuit element outside of the memory array.
SUMMARY OF THE INVENTION
The present invention provides a programmable circuit which relies on a programmable transistor in which the gate threshold voltage for turning the transistor on is programmable. The gate threshold voltage may be programmed to be either a first voltage or a second voltage. The program state of the transistor can be determined by applying a gate threshold voltage between the first and second gate threshold voltages and then determining the operative state, i.e.; on or off, of the transistor.
One of the first and second gate threshold voltages for the transistor can be selected as the normal gate threshold operating voltage for the transistor, while the other gate threshold voltage can be set by applying suitable voltages to the gate and drain electrodes of the transistor to thereby alter the gate threshold voltage to a second value away from the normal gate threshold voltage. The programming voltage for the gate and drain are lower than voltage typically used to program a fuse or antifuse element.
The programming circuit of the invention has particular utility in any integrated circuit which requires a programmable element and has particular utility in the field of DRAMs as a replacement for a fuse or antifuse element.
The above advantages and features of the invention will be more clearly understood from the following detailed description which is provided in connection with the accompanying drawings.
REFERENCES:
patent: 4333164 (1982-06-01), Orikabe et al.
patent: 4384345 (1983-05-01), Mikome
patent: 4605872 (1986-08-01), Rung
patent: 4720816 (1988-01-01), Matsuoka et al.
patent: 4937787 (1990-06-01), Kobatake
patent: 5303184 (1994-04-01), Noda
patent: 5426605 (1995-06-01), Van Berkel et al.
patent: 5448187 (1995-09-01), Kowalski
patent: 5745401 (1998-04-01), Lee
patent: 5768191 (1998-06-01), Choi et al.
patent: 5831894 (1998-11-01), Chang
patent: 5834813 (1998-11-01), Ma et al.
patent: 5835406 (1998-11-01), Chevallier et al.
patent: 5838040 (1998-11-01), Salter, III et al.
patent: 5862074 (1999-01-01), Park
patent: 5886925 (1999-03-01), Campardo et al.
patent: 5896316 (1999-04-01), Toyoda
patent: 5907517 (1999-05-01), Komarek et al.
patent: 6044006 (2000-03-01), Von Basse et al.
patent: 6178114 (2001-01-01), Yang
Troutman, R.R., Abstract No. B79017617, C79012689, FET programmable read-only memory, IBM Technical Disclosure Bulletin, vol. 21, No. 4, pp. 1374-1376, Sep. 1978.
“FET Programmable Read Only Memory”, IBM Technical Disclosure Bulletin, pp. 1374-1376, Sept. 1978.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
Nguyen Tan T.
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