Method and system for chip design using remotely located...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000

Reexamination Certificate

active

06578174

ABSTRACT:

BACKGROUND OF THE INVENTION
1) Field of the Invention
The field of invention is related to electronic design tools and automation, and more specifically to methods and systems for facilitating electronic circuit and chip design using resources accessible over a distributed electronic network such as the Internet.
2) Background
The electronics industry produces ever more advanced chip and circuit designs with the assistance of continuously improving design and verification tools. Chip designs and in particular System on Chip (SoC) designs may contain tens of millions of gates per chip, and will soon be in the range hundreds of millions of gates per chip. Engineers generally require advanced software tools to lay out a chip design and to help manage the huge volume of information associated therewith.
In a high-level view of the electronic design process, a design team takes a product idea from conception to completion over a period of time referred to as “time-to-market.” Increased competition has resulted in immense pressure to reduce time-to-market with new products, because the first company to the market with a new product can typically expect to capture and hold a large market share against later competitors. In this environment, a difference as small as a few days between the planned and the actual shipment of a product may make an enormous difference in its profitability and in the revenue it generates.
In the present environment for designing large-scale circuits and complex chips, time and personnel are often short, and budgets are tight. A recent trend to increase design speed and efficiency involves the re-use or recycling of electronic circuit blocks or subsystems, which are alternatively referred to as “cores”, “virtual component blocks” or “IPs” (an acronym for “Intellectual Properties,” which denotes the proprietary nature of these pre-packaged circuit blocks). Once the design for a virtual component block has been tested and verified, it can be re-used in other applications that may be completely distinct from the application which led to its original creation. Other design groups within the same company as the original designers may achieve this re-use. Alternatively, this re-use may be achieved by other third parties, which purchase, license or transfer the IPs and incorporate the IPs into new designs. For example, an Application Specific Integrated Circuit (ASIC), as used in a cellular phone subsystem, may contain several cores such as a micro-controller as well as a digital signal processor and other components. Although the ASIC as a whole performs a specific function as a cellular phone subsystem, each of the cores within the ASIC design may have a generic use that may be used in other ASICs. After the design for the cellular phone subsystem has been tested and verified, each core could be re-used (as a virtual component block) in, for example, an automotive application. Design reuse of virtual component blocks allows a designer to complete a design much faster than building the entire design from scratch, and avoids the need for debugging, testing and verification of the subsystems embodied in the virtual component block. Examples of virtual circuit blocks or IP cores that are commercially available at present include Viterbi decoders, microcontrollers, digital/analog converters, and encryption/decryption processors, to name a few.
While virtual circuit blocks (i.e., IP cores) provide a means for reducing time-to-market by allowing for the purchase of standard blocks of code, there are a number of barriers to the convenient sale and use of virtual circuit blocks. Although, the re-use of prior core designs reduces total design time the initial search for prior core designs meeting the design criteria of the new ASIC design is in and of itself time consuming and tedious. With regard to quality assurance, for example, there are few, if any, standard methodologies for a designer to be assured of the quality of a virtual circuit block or its suitability for a particular design. Conversely, there are few, if any, standard methodologies for a seller of virtual circuit blocks to demonstrate the quality of the products to prospective customers. Another barrier is protection of the code and/or data comprising the virtual circuit block. Companies providing virtual circuit blocks are in need of a way to track the usage of their products and to protect the code and/or data in those blocks against theft, and such methodologies are preferably unobtrusive, yet allow full access to information required to incorporate those IP cores into a design. Another issue is data format. A virtual circuit block purchased for use in a circuit design must be compatible with the data formats used in that design. However, standards for interfacing with virtual circuit blocks, if they exist, are still evolving. As a result, becoming familiar with an interface format for a virtual circuit block may require a significant amount of work, as well as integrating a virtual circuit block into a circuit design, thus reducing the time advantage obtained through the use of the virtual circuit block. Transaction overhead in the form of high sales and legal costs also discourages sale and use of virtual circuit blocks. For example, legal review by one or both parties is often required with regard to the licensing of virtual circuit blocks.
Another drawback with the present way in which design and verification tools are acquired and used relates to technical support. Vendors often have help lines available to users needing technical support for a given software tool. However, assuming that the engineer gets past the frustrating maze of voicemail and one or more layers of less-knowledgeable first-line support personnel which typically characterize vendor help lines, it often takes a long time for the engineer to explain, and for the support personnel to resolve, an issue with a complex tool as applied to a complex circuit. For serious problems, the vendor may send a field applications engineer to the job site, but it is expensive to do so, and several days may pass before a field applications engineer arrives. During that time, the entire design project may remain at a standstill.
Component selection is also an area that suffers from inefficiencies and unnecessary time delays. An engineer may consult printed catalogs put out by component distributors to learn about and select parts, or may, using the Internet, visit a website of a supplier of manufacturer, where information about components may be found, or may use a search engine to try to gather product information on the Internet. However, searching the Internet for individual components can be time-consuming and tedious. Further, current search engines and methodologies are inefficient and incomplete, and may thus return search results that do not include websites offering components that a designer could beneficially use in a design. Engineers also may receive unsolicited data sheets from manufacturers, but such data sheets are often discarded, lost or forgotten about. Conversely, while the engineer might easily receive data such as IP I/O diagram or other top-level information, engineers may have difficulty receiving vital design information regarding the selected components. As part of the design process it is necessary for the engineers to obtain support data for each of the selected components. With increasing pressures to decrease time to market, it has become more difficult for engineers to spend time talking to supplier or distributor sales representatives, exacerbating the problem of information gathering about components.
Another problem experienced with the chip design process is that knowledge concerning design and verification processes are fragmented, and it is difficult to capture and maintain such knowledge. Attempting to discern through observation and study the individual design processes of many individual engineers is very challenging. Moreover, the design process can rarely be discerned from final blueprints or products, and i

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