Method and system for providing a polysilicon stringer monitor

Details Method and system for providing a polysilicon stringer monitor Method and system for providing a polysilicon stringer monitor

2002-05-23

2003-08-05

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S620000, C438S266000, C438S598000, C438S257000, C438S261000

Reexamination Certificate

active

06602776

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to memory arrays, and more particularly to a method and system for providing a polysilicon stringer monitor.
BACKGROUND OF THE INVENTION
Achieving higher yields continues to be a desired goal during memory chip fabrication. The various processes and techniques used to manufacture chips have therefore become increasingly important. Part of the process involved in manufacturing a flash memory array, for example, requires creating an array of CMOS (Complementary MOS) transistors using layers of polysilicon.
The flash memory array includes columns of active regions that are separated by columns of insulating field oxide regions. The transistors are spaced apart in the active regions and each a row of transistors are bits in a memory word. The transistors are formed with various materials including a type-1 layer of polysilicon, and transistors forming a row in the array are connected by a word-line comprising a type-2 layer of polysilicon.
FIGS. 1-4
are diagrams illustrating the process of creating such a memory array.
FIG. 1A
is a top view of a portion of a substrate
10
and
FIG. 1B
is a cross-sectional view of the substrate
10
along line A. The first step of the process is creating the columns of active regions
12
and insulating field oxide regions (FOX)
14
.
FIGS. 2A and 2B
are top and cross-sectional views of the substrate
10
, respectively, showing that a layer of tunnel oxide
16
is then deposited over the active regions
12
followed by the deposition of a type-1 layer of polysilicon
18
, which is referred to as a poly1 layer. The poly1 layer
18
is then masked and etched as shown.
FIG. 3A
is a top view of the substrate
10
showing that a layer of oxide nitride (ONO)
20
is then deposited over the poly1 layer
18
, and that a type-2 layer of polysilicon
22
(poly2 ) is patterned over the ONO
20
to form word lines.
FIG. 3B
is a cross-sectional view of the substrate
10
along line B, and
FIG. 3B
is a cross-sectional view of the substrate
10
along line C.
In
FIG. 4A
, after the poly2 layer is deposited, an etch is performed on the ONO
20
and the poly1 layer
18
between the rows of the poly2 layer
22
, which is also shown in the cross-sectional view of FIG.
4
B.
FIG. 4C
is a cross-sectional perspective view of the substrate along line E after the etching of the ONO
20
and the poly1 layer
18
. The etching process is anisotropic, meaning that it removes material directionally to a predetermined depth. But due to the shape of the FOX regions
14
, the thickness of the ONO
20
and the poly1 layer
18
at the vertical edges of the poly1 layer
18
is greater than their average thicknesses. Therefore, the etching process sometimes fails to remove all of the ONO
20
and the poly1
18
from the active regions
12
between the rows of poly2
22
, leaving what is called a poly1 stringer
26
. The presence of a poly1 stringer
26
provides a contact between the two adjacent transistors, which causes problems in the memory array.
Accordingly, what is needed is a system and method for detecting the presence of poly1 stringers on a memory array. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a system and method for detecting the presence of poly1 stringers on a memory array. The polysilicon stringer monitor includes a continuous type-2 layer of polysilicon forming a first row and a second row across the active region and covering the active region in-between the first and second rows. The polysilicon stringer monitor further includes a continuous type-1 layer of polysilicon extending under the first row, wherein the type-1 layer also covers the active area in-between the first and second rows as well as covers the active area under the second row.
According to the present invention, extending the type-1 and type-2 layers of polysilicon in this manner effectively enables the detection of poly1 stringers in the active areas of the memory array.


REFERENCES:
patent: 4180826 (1979-12-01), Shappir
patent: 6030868 (2000-02-01), Early et al.
patent: 6057193 (2000-05-01), Wag et al.
patent: 6266264 (2001-07-01), Proebsting

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