Static information storage and retrieval – Read/write circuit
Reexamination Certificate
2002-06-03
2003-08-12
Tran, M. (Department: 2818)
Static information storage and retrieval
Read/write circuit
C365S226000
Reexamination Certificate
active
06606270
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
This invention relates in general to semiconductor memories, such as Dynamic Random Access Memories (DRAMs) and more specifically, to devices and methods for supplying current to semiconductor memories from external sources to support boosted voltages, such as wordline voltages and isolation gate voltages, within such memories while they are tested.
2. State of the Art
Dynamic Random Access Memories (DRAMs) typically include various circuitry that will only operate properly when supplied with a voltage (denoted “V
CCP
”) that is “boosted” above the supply voltage (denoted “V
CC
”). Such circuitry includes, for example, wordlines, which require a boosted voltage V
CCP
to store a full V
CC
level in a memory cell, and isolation gates, which require a boosted voltage V
CCP
to pass a full V
CC
level along a digit line.
In order to supply the boosted voltage V
CCP
, DRAMs typically include an internal charge pump that generates the boosted voltage V
CCP
on one or more capacitors. These capacitors are typically relatively large so they can supply sufficient current I
CCP
to meet any demands that may be made on the charge pump by the DRAM circuitry.
During DRAM compression-mode testing, the demand for current I
CCP
from the charge pump may be many times the demand for current I
CCP
during normal memory operations. This is because many more wordlines and isolation gates may be operated at the same time during compression-mode testing than during normal memory operations.
Consequently, DRAM designers typically find it necessary to provide a DRAM with a charge pump having capacitors of sufficient size to meet the increased demand for current I
CCP
experienced during compression-mode testing, despite the fact that much smaller capacitors would suffice for normal memory operations. As a result, DRAMs shipped to customers typically include charge pumps with capacitors many times the size required for even the most rigorous field applications. These over-sized capacitors unnecessarily occupy integrated circuit (IC) die “real estate,” and thus can either limit the functional circuitry that can be provided in a DRAM, or necessitate a larger die than is desirable for a DRAM.
Therefore, there is a need in the art for a device and method for providing current I
CCP
to a DRAM or other semiconductor memory during testing without having to use a charge pump with over-sized capacitors.
SUMMARY OF THE INVENTION
A semiconductor device, such as a DRAM or other semiconductor memory, in accordance with this invention includes a conductor, such as a voltage bus, that distributes a boosted voltage (e.g., V
CCP
) within the semiconductor device. Internal boosting circuitry, such as a voltage regulator, a ring oscillator, and a charge pump, boosts a voltage level on the conductor upon sensing that the voltage level has fallen below a minimum level, such as a preset minimum. A terminal of the semiconductor device, such as a bond pad, receives current from a current source external to the device, and a switching circuit conducts current received through the terminal to the conductor in response to the internal boosting circuitry sensing that the voltage level on the conductor has fallen below the minimum level. As a result, the external current augments the efforts of the internal boosting circuitry to boost the voltage level on the conductor, thereby providing the necessary support for the boosted voltage during times of peak demand, such as during testing, without the need to provide oversized capacitors, for example, in the internal boosting circuitry. The switching circuit itself may be based on one or more pump circuits controlling one or more NMOS transistor switches that conduct the external current to the conductor when activated.
In other embodiments of this invention, the semiconductor device described above may be incorporated into an electronic device, or may be fabricated on the surface of a semiconductor substrate, such as a semiconductor wafer.
In a further embodiment of this invention, a boosted voltage in a semiconductor device is supported by boosting the boosted voltage using an externally generated current when the boosted voltage falls below a minimum level. The boosted voltage may be boosted by, for example, sensing that the boosted voltage has fallen below the minimum level. A charge pump in the semiconductor device can then be driven to boost the boosted voltage above the minimum level, and a switching circuit in the semiconductor device can be driven to conduct the externally generated current to augment the boosting of the boosted voltage by the charge pump.
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1.3.2 General Economic Factors, Structural and Economic Factors Affecting Volatility, p. 9.
Micro)n Technology, Inc.
Tran M.
TraskBritt
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