Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2001-10-26
2003-08-12
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S692000, C438S693000, C438S694000, C438S697000
Reexamination Certificate
active
06605537
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a method for polishing a semiconductor substrate by Chemical Mechanical Polishing (CMP) to remove excess metal from surface of the substrate.
DESCRIPTION OF RELATED ART
CMP is used to planarize semiconductor substrates. In CMP, a polishing pad is pressed against the substrate and is moved across the surface of substrate while an aqueous liquid polishing composition (also referred to as slurry) is provided between the polishing pad and the substrate. The CMP process is a combination of chemical action and mechanical action. Chemicals in the polishing composition carry out the chemical action while the necessary mechanical action is provided by the movement of the substrate against the polishing pad. Abrasive particles when present in the polishing slurry enhance the mechanical action. An oxidizer when present in the composition converts the metal on the substrate to oxide which is then removed by movement of the substrate against the polishing pad. A metal oxide sometimes serves as an element of a passivating layer. Thus formation of the metal oxide layer the rate of metal removal during the polishing process.
A known polishing process by CMP removes excess metal from an underlying surface of the substrate, and polishes such surface to a smooth planar surface. The known polishing operation begins by polishing with a relatively high polishing pressure, for example, 5 psi, to remove excess metal at a relatively high removal rate, followed by polishing with a relatively reduced polishing pressure, for example, 3 psi, to remove a residual thin film of the excess metal from an underlying surface, and to polish the surface to a smooth polished planar surface.
Copper is a relatively soft metal in comparison to the substrate of the semiconductor wafer that usually is silica or another similar hard substrate. By using conventional polishing equipment and techniques, a copper circuit on a patterned wafer is polished more in the center than on the edges. This phenomenon is commonly known as dishing.
The metal in a trench or trough on the semiconductor substrate provides a metal line forming a metal circuit. One of the problems to be overcome is that the polishing operation tends to remove metal from each trench or trough, causing recessed dishing of such metal. Dishing is undesirable as it causes variations in the critical dimensions of the metal circuit. To minimize dishing, polishing is performed at a lower polishing pressure. However, merely reducing the polishing pressure would require that polishing continue for a lengthened duration. However, dishing would continue to be produced for the entire lengthened duration. What is needed is a method to minimize dishing of metal in trenches or troughs without lengthening the duration of the polishing operation.
SUMMARY OF THE INVENTION
The method of this invention provides for minimal dishing of metal in a trench or a trough on a semiconductor substrate by adjusting the polishing pressure exerted on the semiconductor substrate and utilizing an aqueous polishing composition having an adjusted concentration of an aromatic triazole during the CMP process.
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Steigerwald, Joseph M.; Murarka, Shyam P.; Gutmann, Ronald J.; Chemical Mechanical Planarization of Microelectronic Materials, 1997, pp. 220-222, John Wiley & Sons, Inc. New York, N.Y. US.
Luo, Q et al.: “Copper Dissolution and Chemical-Mechanical Polishing in Acidic Media”; Electrochemical Society Proceedings, Electrochemical Society, Pennington, NJ, US; vol. 97-31, 1998, pp. 73-83.
Kondo, S et al: “Chemical Mechanical Polishing of Copper Using Silica Slurry”, Electrochemical Society Proceedings, Electrochemical Society, Pennington, NJ, US vol. 98-6, May 4, 1998, pp. 195-205.
Bian Jinru
Ghosh Tirthankar
Thomas Terence M.
Biederman Blake T.
Kita Gerald K.
Rodel Holdings Inc.
Tran Binh X.
Utech Benjamin L.
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