Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-07-01
2003-10-28
Ho, Hoai (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S344000, C257S401000, C257S500000, C438S197000
Reexamination Certificate
active
06639276
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to power MOSFETs and processes for their manufacture, and more specifically relates to a novel MOSFET having increased breakdown voltage, and higher concentration of dopants in the drift region producing a reduced on-resistance and die area reduction for a given rating.
BACKGROUND OF THE INVENTION
Power MOSFETs are well known semiconductor devices. Two competing operational characteristics of power MOSFETs are the breakdown voltage and the Rdson (on resistance). Another operational characteristic of a power MOSFET that is important is its switching frequency. It is generally desirable to have a power MOSFET with high breakdown voltage, low Rdson, and a high switching frequency capability. It is also desired to have a power MOSFET having the foregoing characteristics and, in a cellular device, a high cell density in order to reduce the size of the device.
FIG. 1
shows the structure of a well known vertical conduction power MOSFET. The well-known device shown in
FIG. 1
employs a silicon substrate
30
having a junction-receiving epitaxial layer
31
grown on the top surface thereof. A plurality of source regions
33
of the same conductivity as epitaxial layer
31
and substrate
30
are provided in base regions
32
of the opposite conductivity type. Invertible channels
32
′ are disposed between source regions
33
and common conduction regions
35
.
A thin gate oxide
34
overlies the invertible channels
32
′ and the top of the common conduction regions
35
. A conductive polysilicon layer
36
overlies the gate oxide layers
34
and is insulated by a low temperature oxide layer
37
. The polysilicon layer
36
serves as the gate electrode structure for creating the electric field that is required to invert the invertible channels
32
′ in order to electrically link the source regions
33
to the common conduction regions
35
. Oxide spacers
38
are also formed on the sidewalls of the polysilicon layer
36
. Oxide spacers
38
and low temperature oxide layer
37
electrically insulate the polysilicon layer
36
from the contact layer
39
which is electrically connected to the source regions
33
and serves as a contact for the same. Aluminum or some other suitable metal can be used to form the contact layer
39
. It is noteworthy that in the device shown in
FIG. 1
contact layer
39
extends through a depression in the source regions
33
to make contact with the base regions
32
, thus shorting the source regions
33
and the base regions
32
, thereby preventing the operation of the parasitic bipolar transistor in the body of the device. In a vertical conduction MOSFET such as the one shown in
FIG. 1
the bottom free surface of the substrate
30
is also metallized to serve as the drain contact for the device.
The device shown in
FIG. 1
is an N channel MOSFET. In this device, the base regions
32
are lightly doped with a P type dopant such as boron, while the source regions
33
are highly doped with an N type dopant such as phosphorous; the epitaxial layer
31
(or drift region) is lightly doped with an N type dopant such as phosphorous, and the substrate
30
is highly doped with an N type dopant such as phosphorous. A P channel MOSFET may be devised using the same structure as that shown in
FIG. 1
but using the opposite conductivities as that shown in
FIG. 1
in every region.
When a positive voltage of sufficient strength is applied to the polysilicon layer
36
, an electric field is created, which field begins to deplete the invertible channels. When the channels are sufficiently depleted, the invertible channels are inverted and an N channel is formed between the source regions
33
and the common conduction regions
35
. A voltage between the source regions
33
and the drain at the bottom of the device will cause a current to flow between the two.
The lightly doped region in the epitaxial layer
31
is often referred to as the drift region. In the conventional MOSFET shown by
FIG. 1
, this region is lightly doped in order to increase the breakdown voltage of the device. Because it is lightly doped, the drift region significantly contributes to the Rdson of the device. Hence, in conventional MOSFETs a balance must be struck between the desired breakdown voltage and the Rdson in that an improvement in one obtained by varying the concentration of dopants in the drift region adversely affects the other.
Superjunction devices are known. These device include highly doped columns or pylons usually formed under the base regions. The drift region in superjunction devices is also highly doped and has a charge that is equal to that of the highly doped pylons or columns. Due to the increase in the concentration of dopants in the drift region the Rdson of a superjunction device is less than other devices. However, the breakdown voltage of a superjunction device is not compromised due to the increase in the concentration of dopants in the drift region in that the highly doped columns or pylons cause the lateral depletion of the drift region under the reverse voltage condition thereby improving breakdown capability in the device.
A schematic of such a structure, which is often referred to as a superjunction structure is shown in FIG.
2
. Referring to
FIG. 2
, highly doped pylons or columns
32
″ are formed under the body regions
32
. To take advantage of the characteristics of a superjunction charge balance must be struck between the pylons
32
″ and the areas surrounding the highly doped pylons
32
″. Thus, the concentration of the dopants in the drift region is increased to match those of the pylons
32
″. The increase in the concentration of dopants in the drift regions reduces the Rdson of the device. However, as shown in
FIG. 2
, the increase in the dopant concentration does not reduce the breakdown voltage in that the pylons
32
″ operate to deplete the drift region between the pylons for the length of the of the pylons thereby improving the breakdown voltage of the device. As a result, a device is obtained that has a low Rdson and a high breakdown voltage.
As explained above, to reduce the R
DSON
while keeping the breakdown voltage high, deep pylons or columns
32
″ of one of the conductivity types are formed in the drift region of the device. The formation of pylons or columns
32
″ requires many epitaxial depositions each followed by a diffusion drive. Such a process may require many masking steps which further complicate the manufacturing of the superjunction devices. Thus the manufacturing of conventionally known superjunction devices can be a time consuming and therefore expensive process.
The frequency response of a MOSFET is limited by the charging and the discharging of its input capacitance. The input capacitance of a MOSFET is the sum of the gate to drain capacitance (Cgd) and the gate to source capacitance (Cgs). As the Cgd and the Cgs become smaller the MOSFET can operate in a higher frequency range. Thus, it is desirable to have lower input capacitance in order to improve the frequency response of a MOSFET.
BRIEF DESCRIPTION OF THE INVENTION
In accordance with the present invention, deep implanted junctions are provided under the base regions in the drift region which itself may be highly doped and may have a substantially equal charge to the deep implanted junctions. By providing deep implanted junctions in a highly doped drift region the resistivity of the drift region may be reduced without sacrificing the breakdown voltage of the device.
According to an aspect of the present invention, prior to the formation of the MOSgate channel region, deep implanted junctions are formed by one or a plurality of early implants at 5E11 TO 1E14 atoms/cm
2
(for example, boron for a P channel device) and at an energy of 150 KeV to 4 MeV. This process obviates the need for multiple epitaxial depositions to form a plurality of pylons or columns as is required by the prior art devices. More importantly, implants may be carried out during the same maskin
Cao Jianjun
Spring Kyle
Ho Hoai
International Rectifier Corporation
Ostrolenk Faber Gerb & Soffen, LLP
Tran Long
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