Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2000-06-30
2003-04-01
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S153000
Reexamination Certificate
active
06542977
ABSTRACT:
FIELD OF THE INVENTION
The present invention pertains to the field of electronic devices. More particularly, this invention relates to network communications.
BACKGROUND
As more computer devices are networked, communication between the computer devices have become faster. Faster communication involves transmitting and receiving large amounts of data signals between networked devices. Often, the rate at which the data signals are received, processed, and transmitted may determine the speed of the communication.
The data communication platform may be implemented in application specific integrated circuits (ASICs). Data signal ports are incorporated into the data communication platform through which the data signals are received and transmitted. Each data signal port may be both an input port and an output port, and therefore, two data signal ports could possibly receive and transmit data signals as four input/output pairs. Through these data signal ports, data signals are received, processed by the data communication platform, and the data signals are transmitted to their destination. The processing of the data signals by the data communication platform is commonly known as switching, and therefore, one example of a data communication platform implemented in ASICs is an ethernet switch engine.
The data communication platform usually includes a limited number of data signal ports. Often times, the data signal ports may receive data signals while the data signal ports to transmit the data signals to their destinations are occupied, thereby causing a “traffic jam” within the data communication platform. In order to control this “traffic jam” of data signals from preventing communication of the data signals, the data signals are temporarily stored in a memory storage device included with the data communication platform.
The memory storage device, for example, a dynamic random access memory (DRAM) device, may be used as a buffer, i.e., the data signals are temporarily stored in the memory storage device until a data signal port for transmission of the data signal is free to transmit the data signals to their destinations. A measure of the rate at which data signals are deposited and retrieved from the memory storage device may be known as a data signal bandwidth, an access rate of the memory storage device.
Commonly, there are two methods for implementing data communication platforms. One method employs the use of a shared memory storage device, where one memory storage device is utilized by a number of data signal ports of the data communication platform. This method relies on the fact that all of the data signal ports might not be active in receiving and transmitting data signals at the same time. The shared memory storage device is cost effective, but if at some point, all of the data signal ports are active, the memory storage device will not have enough capacity to accommodate all of the data signals being received and transmitted by the data communication platform because the memory storage devices are of a limited capacity as part of the cost effectiveness. Some data signals may be lost or sent back to the sender causing unreliable data signal communication.
Another method employs the use of a dedicated memory storage device for each data signal port. This method provides reliable data signal communication because each memory storage device will have enough capacity to accommodate receiving and transmitting the data signal at each data signal port. However, depending upon the number of data signal ports, this method will require a large amount of memory because each data signal port would have its own dedicated memory storage device dedicated to the data signal port. Additionally, the dedicated memory storage device method is not as cost effective as the shared memory storage device method because if the any of the data signal ports are inactive, the memory storage device would not be utilized for those inactive data signal port.
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Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Thai Tuan V.
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