Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-08-07
2003-07-22
Niebling, John F. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06598217
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of mounting fabrication-historical data for a semiconductor device on each of chips formed on a wafer. The present invention also relates to a semiconductor device that is fabricated using such a method.
2. Description of Related Art
Conventionally, the technologies for individually mounting fabrication-historic data for a semiconductor device on respective chips formed on a wafer during the process of wafer processing have been known. For example, Japanese Patent Application Laying-open No. 6-84730/1994 discloses a method of fabricating a semiconductor device in which an additional memory area is formed on a semiconductor chip in the process of wafer-processing and individual data of the chip is written to such an area during the process of probe-examination before the process of dicing the wafer into chips. Such individual data is used for tracking down the cause of a failure and taking measures against such a failure at an early stage if the chip fails after the fabrication of the semiconductor device. In this case, the correspondence between the wafer-processing procedure and a defective condition of the chip is examined with reference to the fabrication-historical data stored in the failed chip.
In this case, however, all of the chips must be written on an individual basis so that is no effective procedure to easily mount the fabrica-historical data on the chip without taking much expense in time and effort.
SUMMARY OF THE INVENTION
The present invention is implemented to solve the foregoing programs. It is therefore an object of the present invention to provide a method for easily providing fabrication-historic data for a semiconductor device to each individual chip on a wafer and also to provide a semiconductor device to be fabricated by such a method.
According to a first aspect of the present invention, there is provided a method of providing fabrication-historic data for a semiconductor device to a chip, comprising the step of: preparing a wafer with a pattern of a plurality of chips, where each chip has a product area to function as a semiconductor device and a fabrication-historical data area on which fabrication-historical data is to be held, wherein different fabrication-historical data is provided for each chip by exposing all of the chips on the wafer as a single unit by means of the exposure system using a master mask.
Here, the method may further comprise the steps of: forming a gate electrode pattern for transistors on both product and fabrication-historical data areas in each of chips formed on the wafer by means an exposure system using a predetermined mask; forming holes for forming connections among the transistors on the product area and the fabrication-historical data area of each of the chips formed on the wafer by means of an exposure system using a predetermined mask; and carrying out wiring among the transistors by a conductive material using the holes, wherein different fabrication-historical data is provided for each chip by the exposure through master mask that provides a pattern for connecting the transistors on the fabrication-historical data area with each other in a different way for each chip to store the desired fabrication-historical data for each chip while the product area of each chip is blank-shot in at least one of the steps of forming the contact holes and carrying out wiring among the transistors.
The method may further comprises the steps of: forming a gate electrode pattern for transistors on the product area in each chip formed on the wafer by means an exposure system using a predetermined mask; forming holes for forming connections among the transistors on the product area of each of the chips formed on the wafer by means of an exposure system using a predetermined mask; and carrying out wiring among the transistors by a conductive material using the holes, wherein different fabrication-historical data is provided for each chip by the exposure through the master mask that provides a pattern for forming an identical mark that represents different fabrication-historical data for each chip to be physically distinguished while the product area of each of them is blank-shot in one of the steps of forming the holes and carrying out wiring among the transistors.
An identical mark may be any combination of characters and numerics.
According to a second aspect of the present invention, there is provided a method of providing fabrication-historic data for a semiconductor device to a chip, comprising the steps of: preparing a wafer with a pattern of a plurality of chips, where each chip has a product area to function as a semiconductor device and a fabrication-historical data area on which fabrication-historical data for the semiconductor device is to be held; forming a plurality of power pads to be connected to power supplies, a plurality of grounding pads to be connected to grounds, and intermediate pads which are not connected to both the power and grounding pads on the fabrication-historical data area using a predetermined mask; and forming electric conductors for connecting the power pads with the intermediate pads or connecting the grounding pads with the intermediate pads in a different way for each chip using a predetermined mask to store fabrication-historical data for each fabrication-historical data area in a plurality of the intermediate pads.
According to a third aspect of the present invention, there is provided a semiconductor device comprising a product area and a fabrication-historical data area, wherein the fabrication-historical data area has fabrication-historical data, which is provided by the method according to the first or second aspect of the present invention.
REFERENCES:
patent: 4055802 (1977-10-01), Panousis et al.
patent: 5103557 (1992-04-01), Leedy
patent: 5302491 (1994-04-01), Akylas et al.
patent: 5439764 (1995-08-01), Alter et al.
patent: 5642307 (1997-06-01), Jernigan
patent: 5654588 (1997-08-01), Dasse et al.
patent: 5690785 (1997-11-01), Nakaya
patent: 5990540 (1999-11-01), Yokoya
patent: 6096093 (2000-08-01), Caywood et al.
patent: 6238824 (2001-05-01), Futrell et al.
patent: 6277530 (2001-08-01), Yamada
patent: 6340542 (2002-01-01), Inoue et al.
patent: 1-154510 (1989-06-01), None
patent: 6-84730 (1994-03-01), None
patent: 9-223723 (1997-08-01), None
Burns Doane , Swecker, Mathis LLP
Mitsubishi Denki & Kabushiki Kaisha
Niebling John F.
Whitmore Stacy
LandOfFree
Method of mounting fabrication-historical data for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of mounting fabrication-historical data for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of mounting fabrication-historical data for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3105743