Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – On insulating carrier other than a printed circuit board
Reexamination Certificate
2000-10-30
2003-09-23
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
On insulating carrier other than a printed circuit board
C257S737000, C257S738000, C257S780000, C257S781000
Reexamination Certificate
active
06624504
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a structure of a semiconductor device for flip chip bonding and a method for producing the semiconductor device.
Most of semiconductor devices have a multi-layer structure in which electrically insulating layers are disposed between the respective layers. Each of the electrically insulating layers has one or more opening portions. There exists wiring for connecting a terminal on a lower side of the electrically insulating layer to a terminal on an upper side of the electrically insulating layer through the opening portion in each insulating layer.
The following method is used for forming such an electrically insulating layer. That is, an opening portion is formed in an electrically insulating layer by the steps of: applying a photosensitive electrically insulating material onto a semiconductor device by a spin coating method; and performing exposure and development thereon. Metal wiring for connecting a terminal on a lower side of the electrically insulating layer to a terminal on an upper side of the electrically insulating layer is formed by the steps of: applying a second photosensitive material onto a layer on the upper side of the electrically insulating layer; performing exposure and development thereon to form a mask; and carrying out a process such as plating, sputtering, CVD, evaporation, etc. The photosensitive electrically insulating material used as mask is removed after it becomes no longer necessary.
Wiring for connecting a terminal on the lower side of the electrically insulating layer to a terminal on the upper side of the electrically insulating layer can be formed by the aforementioned steps.
FIG. 31
is a sectional view showing a part of the semiconductor device formed by the aforementioned steps. In
FIG. 31
, an aluminum pad
7
is a terminal on a lower side of an electrically insulating layer
12
, and a bump pad
3
is a terminal on an upper side of the electrically insulating layer
12
. The electrically insulating layer
12
which is formed on a wafer
9
having a semiconductor formed thereon has an opening portion formed over the aluminum pad
7
. Metal wiring
11
is formed in an area from the aluminum pad
7
to the bump pad
3
above the electrically insulating layer
12
. A bump
10
is formed on the bump pad
3
. Incidentally, the formation of wiring in an area from the aluminum pad
7
to the bump pad
3
is termed “distribution”. In this illustration, the thickness of the electrically insulating layer
12
is selected to be approximately equal to the thickness of the metal wiring
11
.
Flip chip bonding may be a model of method of mounting and bonding a semiconductor device, which is produced in the aforementioned steps, onto a circuit substrate such as a printed wiring board.
FIG. 32
is a sectional view of a flip chip-bonded semiconductor device. The bump
10
provided on a terminal of the semiconductor device
13
is once melted and then solidified again on the circuit substrate
14
to thereby bond the semiconductor device
13
onto the circuit substrate
14
. A gap between the semiconductor device
13
and the circuit substrate
14
is filled with a highly rigid resin. Incidentally, the resin is termed “underfill 15” and effects reinforcement of the junction portion. JP-A-11-111768 discloses an example of flip chip bonding by use of the underfill.
SUMMARY OF THE INVENTION
The aforementioned conventional art, however, has the following problems.
Firstly, there is difficulty in the method of supplying the resin to the gap between the semiconductor device and the circuit substrate. That is, a method using a capillary phenomenon is employed as the method of supplying the resin to the gap that is not larger than 0.3 mm generally. The resin as a material for the underfill is, however, a liquid resin with a high viscosity. Hence, there are problems that a great deal of time is required for filling the gap with the resin and that air bubbles often remain in the resin, etc.
Secondly, there is difficulty in detachment of the semiconductor device. That is, in case that the semiconductor device is to be detached from the circuit substrate for the reason that the semiconductor device bonded onto the circuit substrate is defective, the cured underfill material still remains on the circuit substrate even after the detachment of the semiconductor device. Hence, there is a problem to recycle the circuit substrate.
To solve the first and second problems, it is preferable that the semiconductor device is bonded onto the circuit substrate without application of the underfill. However, if the underfill is not applied, there will arise another problem that the junction lifetime of the semiconductor device is shortened extremely. This is because the underfill is applied for the purpose of preventing the junction portion from being destroyed owing to strain caused by heat generation in the junction portion at use of a finished electric appliance.
An object of the present invention is to form an electrically insulating layer on each of semiconductor devices even in the case where the length and width sizes of the semiconductor device are small, thereby attaining a semiconductor device where flip chip bonding can be performed without any underfill.
To achieve the foregoing object, the present invention is made as described in the appended claims. For example, a thick-film electrically insulating layer is printed so as to extend over a plurality of semiconductor devices. The thick film electrically insulating film is cut in a region on which there is no wiring to thereby divide the thick-film electrically insulating layer.
Hence, it is possible to provide a semiconductor device in which flip chip bonding can be performed without any underfill, and in which an electrically insulating layer can be formed on each semiconductor device even in the case where the length and width sizes of the semiconductor device are small. Incidentally, in this specification, the thick-film electrically insulating layer is referred to as “stress relaxation layer”.
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Dictionary of Mounting Technology In Electronics, Jan. 20, 1992, p. 103.
2000-333526—Partial English translation of Official Action mailed Oct. 29, 2002.
2000-333528—Partial English translation of Official Action mailed Oct. 29, 2002.
Anjo Ichiro
Hozoji Hiroshi
Inoue Kosuke
Kanda Naoya
Minagawa Madoka
Antonelli Terry Stout & Kraus LLP
Talbott David L.
Thai Luan
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