Method of fabricating a semiconductor device by calcium...

Details Method of fabricating a semiconductor device by calcium... Method of fabricating a semiconductor device by calcium...

2002-08-13

2003-09-23

Fahmy, Wael (Department: 2814)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S761000

Reexamination Certificate

active

06624074

ABSTRACT:

TECHNICAL FIELD
The present invention relates to semiconductor devices and their methods of fabrication. More particularly, the present invention relates to calcium-doping of a copper surface (e.g., interconnect material) and resultant devices utilizing such a process. Even more particularly, the present invention relates to reducing and minimizing carbon, sulphur, and oxygen impurities in a calcium-doped copper interconnect surface.
BACKGROUND OF THE INVENTION
Currently, the semiconductor industry is demanding faster and denser devices (e.g., 0.05-&mgr;m to 0.25-&mgr;m) which implies an ongoing need for low resistance metallization. Such need has sparked research into resistance reduction through the use of barrier metals, stacks, and refractor metals. Despite aluminum's (Al) adequate resistance, other Al properties render it less desirable as a candidate for these higher density devices, especially with respect to its deposition into plug regions having a high aspect ratio cross-sectional area. Thus, research into the use of copper as an interconnect material has been revisited, copper being advantageous as a superior electrical conductor, providing better wettability, providing adequate electromigration resistance, and permitting lower depositional temperatures. Cu interconnect material may be deposited by chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, electroless plating, and electrolytic plating. However, some disadvantages of using Cu as an interconnect material include etching problems, corrosion, and diffusion into silicon.
1
These problems have sparked further research into the formulation of barrier materials for Cu, which in turn, identified another host of problems associated with the barrier materials themselves (e.g., contamination).
1
Peter Van Zant, Microchip Fabrication: A Practical Guide to Semiconductor Processing,
3
rd
Ed., p. 397 (1997).
In response to interconnect impurity level concerns relating to the fabrication of semiconductor devices having doped copper interconnect surfaces, the industry has been utilizing chemical vapor deposition (CVD) methods. Ca, if used as a dopant, would be an inherently highly reactive element in air; therefore, a Ca-doped Cu surface would behave similarly. Contamination in the doped Cu surfaces is especially problematic when wet-chemical methods are used for processing. Doped Cu surfaces have been found to be highly susceptible to carbon (C), sulphur (S), and oxygen (O) contamination, forming an impure layer on the order of 10-20 Å in thickness, as characterized by AES/XPS methods. However, although CVD has been conventionally used for depositing other metal(s) on an interconnect surface, CVD is not a cost-effective method of doping Cu interconnect surfaces with Ca ions. Therefore, a need exists for providing a method of fabricating a semiconductor device by doping a Cu interconnect surface and by cost-effectively removing the contaminant layer of the doped Cu surface.
BRIEF SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method of fabricating a semiconductor device having contaminant-free Ca-doped Cu surfaces formed on Cu interconnects by cost-effectively depositing a Cu—Ca—X surface (e.g., a Cu—Ca—O surface) and subsequently removing the contaminant layer contained therein; and a device thereby formed. Formation of the Cu—Ca—X surface, where the contaminant X═C, S, or O, removal of such contaminant from the Cu—Ca—X surface is achieved by (a) immersing the Cu interconnect surface into an electroless plating solution comprising Cu salts, Ca salts, their complexing agents, a reducing agent, a pH adjuster, and at least one surfactant for facilitating Ca-doping of the Cu interconnect material; and (b) annealing of the Cu—Ca—X surface under vacuum onto the underlying Cu interconnect material to form a Cu—Ca film on Cu interconnect structure, thereby producing a uniform Cu—Ca film (i.e., Cu-rich with 0.2-5% Ca) on the Cu surface of an interconnect for maximizing Ca—Cu/Cu interconnect structure reliability, electromigration resistance, and corrosion prevention. The annealing step primarily removes O and secondarily removes C and S, especially when performed under vacuum, an inert gas, or a reducing ambient such as ammonia (NH
3
) plasma. Thus, the resultant device then comprises a distinctive contaminant-reduced Ca—Cu/Cu interconnect structure.


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Peter Van Zant, Microchip Fabrication: A Practical Guide to Semiconductor Processing, 1997, p. 397, 3rdEdition, McGraw-Hill, USA.

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