Data processing device

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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Details

C710S055000, C710S054000, C370S235000, C370S426000

Reexamination Certificate

active

06604154

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates to a data-processing device, in particular, it relates to a data processing device that is used in a system that conducts transmitting and receiving of data in packet units through the medium of a serial bus that conforms to the IEEE 1394 standards.
BACKGROUND OF THE INVENTION
In the past, in order to accept image and voice data, and control an AV machine with a data-processing device such as a personal computer, a video capture board, an RS232C bus, and the like were individually required, and unified handling could not be done.
Thus, in recent years standards suited to data transmission in the multimedia era have been proposed, for example, by means of the “IEEE 1394 High Performance Serial Bus Standards” (hereinafter, called IEEE 1394 Standards), and environmental improvements have been made to be able to freely conduct high speed, high volume communications.
One example of a conventional data processing device is shown at key
101
of FIG.
4
. This data processing device
101
, along with another data processing device that is not illustrated, is connected to an IEEE 1394 bus
106
. The IEEE 1394 bus
106
, which conforms to the IEEE 1394 Standards, is a serial bus in which the propagation of data in packet units is possible, the data processing device
101
transmits a request packet and receives only an acknowledge signal through the medium of the IEEE 1394 bus
106
, but by receiving a response packet in addition to the acknowledge signal the exchange of data with another data processing device can be done.
The data processing device
101
has a microcomputer
102
, a transmitting device
103
, and a receiving device
104
. Among these, the transmitting device
103
and the receiving device
104
are arranged in parallel between the microcomputer
102
and the IEEE 1394 bus
106
.
An explanation is given in regard to the case wherein this type of data processing device
101
conducts the exchange of data with another data processing device while referencing the flow chart of FIG.
5
. This is a flow chart showing the processes that the transmitting device
103
conducts in the interval of transmitting a request package, and the keys S
101
to S
106
show each processing step.
First, the microcomputer
102
creates request packets based on a prescribed program, and outputs them one after another to the transmitting device
103
. Each request packet carries the information from the data processing device
101
, which is the transmitting source, and includes the recognition information that recognizes the request package, the information that specifies another data processing device for the transmit destination of the request packet, and information for the purpose of specifying the data to be read out.
The transmitting device
103
has an internal buffer memory (not illustrated) that sequentially holds the request packets that are successively input in the buffer memory, reads these out one at a time, and sends them to the IEEE 1394 bus
106
S
101
.
The transmitting device
103
sends a request packet, outputs recognition information for the request packet that has been sent to the receiving device
104
, and, along with notifying the receiving device
104
of the purpose that a request packet has been sent, transitions to an input wait condition for an acknowledge signal S
102
, and until the acknowledge signal, explained below, signal is input, it cannot transmit a new request packet.
When the request packet is sent to the IEEE 1394 bus
106
, the other data processing device (hereinafter, called the other party data processing device) that was specified by the contents of the request packet sequentially receives the request packet from the IEEE 1394 bus
106
, reads out its content, and sends an acknowledge signal corresponding to that content to the IEEE 1394 bus
106
. What is referred to as an acknowledge signal is information made up of either of “acceptance confirmation” or “pending,” and is a signal that is sent for the purpose of notification of the report that the request packet has been received. The acknowledge signal of acceptance confirmation is sent in the event the response packet is deemed unnecessary, and the acknowledge signal of pending is sent when it is deemed respectively that the response packet is necessary.
After a prescribed time has elapsed after the request packet is received, in the event neither of the acknowledge signals are input to the transmitting device
103
from the receiving device
104
, the transmitting device
103
determines that an error has been generated, notifies that purpose to the microcomputer
102
, and shifts to error processing S
103
.
On the other hand, in the event an acknowledge signal is input to the transmitting device
103
from the receiving device
104
, the input acknowledge signal is detected, and a determination is made as to whether that acknowledge signal is an acknowledge signal of acceptance confirmation S
104
. In the event it is an acknowledge signal of acceptance confirmation, the transmitting device
103
determines that the transaction has been completed, and one processing series relating to the transmission of one request packet is completed. When the processing series is completed, the transmitting device
103
transitions to a condition in which it is possible to transmit a new request packet.
On the other hand, in the event the acknowledge signal that has been received is not an acknowledge signal of acceptance confirmation, but is an acknowledge signal of pending, the transmitting device
103
shifts to the response signal wait condition S
105
. When it shifts to this response signal wait condition, the transmitting device
103
transitions to a condition in which a new request packet cannot be transmitted until the fact that the previously mentioned response packet has been received is acknowledged.
The other party data processing device that has sent the acknowledged signal of pending in response to the content of the received request packet generates a response packet containing recognition information, information that specifies the transmission source and transmission destination, information that specifies the other data processing device of the transmission destination for the request packet, information for the purpose of specifying the data that is to be read out, and the like, and sends it to the IEEE 1394 bus
106
.
If the receiving device
104
has received the response packet, receiving device
104
outputs recognition information for the response packet that has been received to the transmitting device
103
, and notifies it of the purpose that the response packet has been received.
When the fact that the response packet has been received is confirmed by means of this notification, the transmitting device
103
assumes that there is a completion of that transaction and shifts to a condition in which transmission of the next request packet is possible.
The receiving device
104
, when it is notified of the purpose that the response packet has been received, outputs that response packet to the microcomputer
102
. The microcomputer
102
conducts processes such as storing the input response packet in a prescribed memory device.
If there is not a notification of the purpose that the response packet has been received even after a fixed time has elapsed after the acknowledge signal of pending has been input, the transmitting device
103
determines that an error has been generated, notifies the microcomputer
102
of that purpose, and shifts to error processing S
106
.
As was explained above, this data processing device
101
can conduct the exchange of data by transmitting a request packet and receiving a corresponding response packet.
However, with this data processing device
101
there is a problem that, since the determination processes must be conducted for determining whether or not an acknowledge signal has been input S
102
, determining whether or not the input acknowledge signal is acceptance confirmation S
104
, and

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