Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2001-02-14
2003-05-27
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
Reexamination Certificate
active
06569719
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an insulated gate field effect semiconductor device using a thin film semiconductor and a method for producing the same.
2. Description of the Related Art
A known structure of an insulated gate field effect transistor using a thin film semiconductor (hereinafter referred to simply as “TFT”) is shown in FIG.
2
D. The method for producing such TFT is described below with reference to
FIGS. 2A
to
2
D.
A base film (silicon oxide film)
22
is formed on a glass substrate
21
at a thickness of approximately 2000 Å. On the base film
22
, a silicon semiconductor layer
23
having amorphous or crystalline structure is formed as an active layer (where source/drain regions and a channel forming region are formed) at a thickness of about 1000 Å to obtain the shape shown in FIG.
2
A. An element separation patterning is performed to obtain a shape shown in FIG.
2
B. During this patterning, it is difficult to etch only the active layer
23
, and the base film
22
is also etched to some extent. As a result, a recessed portion
24
occurs on the base film
22
.
A silicon oxide film
26
as the gate insulating film is formed at a thickness of approximately 1000 Å. As seen in
FIG. 2C
, however, the film
26
also generates a recessed portion
27
.
FIG. 4
is a cross section TEM photograph corresponding to the shape shown in FIG.
2
C. The photograph represents the state of thin film at the recessed portion
27
where a concave strip appears to form a notch.
After this etching, an aluminum film
28
is formed at a thickness of 6000 Å, and the film
28
is patterned to form a gate electrode. Then an anodizing treatment is given to the patterned electrode to form an oxide layer
29
at a thickness of 2000 Å.
FIG. 2D
shows the A-A′ cross section of FIG.
2
C. As illustrated in
FIG. 2D
, the aluminum film
28
is patterned to form the gate electrode.
FIG. 3
is a schematic drawing of a plan view of a TFT shown in
FIG. 2C
or FIG.
2
D. The C-C′ cross section of
FIG. 3
corresponds to
FIG. 2D
, and the B-B′ cross section corresponds to FIG.
2
C. The reference numbers
30
through
32
in
FIG. 3
are the contact electrodes, though they are not shown in FIG.
2
C and FIG.
2
D.
A problem of such TFT is that the presence of recessed portion
27
causes substantial break of the gate electrode and the gate wiring
28
. The breaking is presumably caused by the following phenomena.
1. The patterning of the gate electrode
28
made of aluminum is preferably conducted by a selective etching using a wet-etching method. By this etching process, however, an etchant solution enters into the recessed portion
27
. As a result, the recess is enlarged, and, in the worst case, the gate electrode
28
breaks at the portion
34
.
2. By anodizing after the aluminum film
28
is patterned, the surface of the patterned gate electrode
28
is oxidized. During the anodizing, however, the electrolyte solution enters into the recessed portion
27
to oxidize the portion
34
from the gate electrode side. Consequently, the gate electrode
28
increases its resistance and further becomes insulated.
The defects of TFT are supposed often to occur by the combination of these reasons. The production of TFTs having a structure shown in
FIGS. 2C
to
2
D faces reduction of a yield.
SUMMARY OF THE INVENTION
The object of this invention is to prevent the etching of the portion
27
during the patterning of the aluminum film
28
and to prevent the oxidation also at the recessed portion
27
during the anodization after this patterning, in the treatment shown in FIG.
2
C.
A preferred mode of the invention is described using FIG.
1
C. According to the invention, as typically illustrated in
FIG. 1C
, a titanium nitride film
17
is formed on a gate insulating film
16
, and further an aluminum film
18
used as a gate electrode is formed on the film
16
. Since the titanium nitride film
17
can be formed at an extremely high step coverage (difference level coating) using a sputtering method, the recess
151
is buried or covered by the film
17
.
The reason for selecting the titanium nitride film is that the material has etching selectivity to aluminum film. In concrete terms, during the etching of aluminum film, the titanium nitride film is not etched, and during anodizing, the titanium nitride film is not oxidized. Accordingly, a film having those characteristics may be used in place of titanium nitride film independent of the conductivity and insulating property of the film. Examples of that type of material that exhibits a similar effect as the titanium nitride film and is useful in this invention are a metallic titanium film in which no nitrogen is added and a phosphorus-doped silicon film formed by low pressure CVD (LPCVD) method. That type of film may be formed at a thickness from 50 to 1000 Å, for example, a thickness from 50 to 500 Å. It is necessary to form the thin film in consideration of the thickness of gate insulating film and of gate electrode.
According to the invention, wiring containing mainly aluminum is formed with high reliability on an object having a convex portion. When an electrode or wiring containing mainly aluminum is formed by covering on or crossing over the object (for example, the active layer
14
in
FIG. 1B
) having a convex, the breakage of the wiring structured with the aluminum film
18
at the edge
15
of the convex portion can be prevented. Because the first film (for example, the titanium nitride film
17
) exhibits an etching selectivity for the second film (for example, the aluminum film
18
). This utilizes the characteristic that the first film is not etched or has a low etching rate during the etching of second film.
In particular, when a titanium nitride film is used as the first film, when an aluminum film is used as the second film, and when the surface of the aluminum film is oxidized during the anodization, the oxidation in the vicinity (the portion
152
of
FIG. 1C
) of edge root of the convex on the object from the object side can be prevented, and the defects caused by substantial breakage of the second film can be reduced.
Titanium nitride film is not etched by an aluminum etchant. Consequently, even when an etchant enters the recess
151
during the patterning of gate electrode and gate wiring, the etching of aluminum film
18
can be prevented.
Furthermore, in the anodizing after the patterning of aluminum film
18
, even if the electrolyte solution enters the portion
151
, the oxidization of the aluminum film
18
from the gate insulating film side can be prevented.
As described above, the breakage of the aluminum film can be prevented by forming on the gate insulating film an aluminum film used as the gate electrode, via a titanium nitride film.
REFERENCES:
patent: 3855112 (1974-12-01), Tomozawa et al.
patent: 4570328 (1986-02-01), Price et al.
patent: 4646426 (1987-03-01), Sasaki
patent: 4707721 (1987-11-01), Ang et al.
patent: 4755478 (1988-07-01), Abernathey et al.
patent: 4931411 (1990-06-01), Tigelaar et al.
patent: 5141897 (1992-08-01), Manocha et al.
patent: 5166086 (1992-11-01), Takeda et al.
patent: 5177577 (1993-01-01), Taniguchi et al.
patent: 5240868 (1993-08-01), Bae et al.
patent: 5245207 (1993-09-01), Mikoshiba et al.
patent: 5252502 (1993-10-01), Havemann
patent: 5308998 (1994-05-01), Yamazaki et al.
patent: 5366912 (1994-11-01), Kobayashi
patent: 5470762 (1995-11-01), Codama et al.
patent: 5478766 (1995-12-01), Park et al.
patent: 5498573 (1996-03-01), Whetten
patent: 5576225 (1996-11-01), Zhang et al.
patent: 5604137 (1997-02-01), Yamazaki et al.
patent: 5614732 (1997-03-01), Yamazaki
patent: 61-183971 (1986-08-01), None
patent: 2-295111 (1990-12-01), None
patent: 04-11722 (1992-01-01), None
patent: 04-058564 (1992-02-01), None
patent: 04-101453 (1992-04-01), None
patent: 0 502 749 (1992-09-01), None
patent: 04-360580 (1992-12-01), None
patent: 05-114724 (1993-05-01), None
patent: 05-299655 (199
Miyazaki Minoru
Murakami Akane
Teramoto Satoshi
Cieslewicz Aneta
Costellia Jeffrey L.
Fahmy Wael
Semiconductor Energy Laboratory Co,. Ltd.
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