Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2000-12-21
2003-09-02
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S714000, C438S718000, C438S752000
Reexamination Certificate
active
06613679
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to a method for fabricating a semiconductor device including a compound semiconductor layer, and more particularly relates to increasing the yield of the device.
In recent years, research and development has been carried on vigorously to further reduce the costs of semiconductor laser modules. First of all, reducing the fabrication costs of semiconductor laser chips for use in the laser modules is effective in attaining such an object. Minimizing variation in the width of a striped active layer is one of effective means for cutting down on the fabrication costs of the laser chips. This is because difference in characteristics of the laser chips can be reduced, and the yield increases. As a result, the manufacturing costs of the laser chips can be cut down.
Reducing the divergence angle of a beam emitted from a semiconductor laser diode is effective in further lowering the fabrication costs of the laser modules. With a laser diode emitting a beam with a reduced divergence angle, the laser diode can be connected to an optical fiber directly without using a lens. Thus, the number of components required can be decreased.
If a semiconductor laser diode, emitting a beam with a broad divergence angle, should be connected to an optical fiber by way of a lens, the laser beam has to be guided to the core of the fiber accurately. For that purpose, the diode and the fiber need to be aligned with each other so that the beam is guided to the fiber most efficiently while being emitted from the diode. That is to say, active alignment should be performed. However, the active alignment needs high precision, expensive equipment and yet it takes much trouble and time to connect the diode to the fiber. Therefore, the cost of fabricating the module gets much higher.
In contrast, if the divergence angle of a beam emitted from a semiconductor laser diode is reduced, a lens does not have to be used. Accordingly, by aligning the diode and the fiber with each other mechanically, the diode can be connected to an optical fiber so that the laser beam is guided to the fiber efficiently. That is to say, passive alignment is performed in that situation. The passive alignment only needs equipment that aligns the diode and the fiber mechanically and precisely. Also, it does not take so much time to connect the diode to the fiber. Therefore, the fabrication cost of the laser module can be lowered. Several techniques of reducing the divergence angle of a beam emitted from a laser diode have been suggested. One of those techniques is making the diameter of the beam, emitted from the diode, 1 &mgr;m or less by shaping a striped active layer of the diode in such a manner that the layer has a tapered cross section.
As described above, it can be seen that precise control over the width of a striped active layer changes the resultant characteristic of a semiconductor laser diode being fabricated and the cost of fabricating a semiconductor laser module significantly.
A known technique of forming a striped active layer made of compound semiconductors containing indium (In), phosphorus (P), gallium (Ga) and arsenic (As), for instance, is described in detail, e.g., in “Semiconductor Laser Diode and Optical Integrated Circuit” (Yasuharu Suematsu, published by Ohmsha, pp.429-436, 1984). According to the technique described in this document, a multilayer structure, made up of at least InGaAsP and InP layers, is etched to a reversed taper shape. Specifically, the InGaAsP and InP layers are deposited in this order over an InP substrate by crystal growth. Then, the etching is performed using a mixture of bromine and methanol (which will be herein called Br
2
/CH
3
OH mixture), as a non-selective etchant against the InGaAsP and InP layers. In this process step, a silicon dioxide (SiO
2
) film is used as a mask. The next step is selectively etching only the InP layer utilizing a mixture of hydrochloric acid and water (which will be herein called HCl/H
2
O mixture). By making use of this technique, it is possible to form a striped active layer extending in the [100] direction so that its side faces cross the substrate substantially at right angles on a cross section.
In this technique, however, the width of the striped active layer is adjusted by controlling the etch time. Therefore, if the diameter of the InP substrate is increased to form a greater number of semiconductor laser chips on the same substrate, the width of the striped active layer is likely to vary on the order of sub-microns within the same substrate and among substrates. As a result, the yield of the laser chips adversely decreases and the costs of fabricating the laser modules rise.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to reduce the variation in etch rate of a compound semiconductor layer.
An inventive method for fabricating a semiconductor device with a compound semiconductor layer includes the steps of: a) depositing a masking film on a first compound semiconductor layer formed on a semiconductor substrate; b) patterning the masking film so that the film has an opening; c) etching away at least an uppermost part of the first semiconductor layer, which part is located inside the opening and includes a degraded layer formed in the step a) or b), using a first etchant and the masking film; and d) patterning the first semiconductor layer by etching away another part of the first layer using a second etchant and the masking film. Said another part is located inside the opening and does not include the uppermost part with the degraded layer. The second etchant allows for etching the first layer at a rate lower than a rate realized by the first etchant.
The uppermost part of the first semiconductor layer with the degraded layer, which has been formed in the step a) or b) and is located inside the opening, is etched away using the first etchant and the masking film. Accordingly, when another part of the first semiconductor layer other than the uppermost part is removed using the second etchant, there is no need to etch the degraded layer anymore. Therefore, the variation in etching start time of the first semiconductor layer can be reduced in the step d). As a result, the variation in etch rate on the same substrate or among substrates can be reduced in the step d). That is to say, the variation in etch rate of the remaining first semiconductor layer can be reduced.
In the step b), the masking film is preferably patterned by a dry etching process.
By performing the dry etching process, the opening of the masking film can be patterned precisely.
The degraded layer includes at least one of: a damaged layer that has a composition deviated from a stoichiometric composition of elements in the first semiconductor layer; an oxide layer of the first semiconductor layer; and a reactant layer formed through a reaction of the first semiconductor layer with a reactive gas for use in the dry etching process.
In the step a), an uppermost part of the substrate may be a second compound semiconductor layer. And the method may further include the step of patterning the second semiconductor layer using a remaining part of the first semiconductor layer as a mask after the first layer has been patterned in the step d).
Another inventive method for fabricating a semiconductor device with a compound semiconductor layer includes the steps of: a) depositing a masking film on a compound semiconductor layer formed on a semiconductor substrate; b) patterning the masking film so that the film has an opening; c) removing a first part of the semiconductor layer to a predetermined point by a dry etching process using the masking film; and d) etching away at least a second part of the semiconductor layer using a first etchant and the masking film. The first part is located inside the opening and the second part includes a degraded layer formed in the step c).
The first part of the semiconductor layer is patterned by the dry etching process using the masking film. And then the degraded l
Deo Duy-Vu
Matsushita Electric - Industrial Co., Ltd.
Nixon & Peabody LLP
Studebaker Donald R.
Utech Benjamin L.
LandOfFree
Method for fabricating a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for fabricating a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3084668