Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-11-10
2003-07-29
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S352000, C257S357000, C257S066000, C257S705000, C257S706000, C257S707000, C257S712000
Reexamination Certificate
active
06600197
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to thin-film elements using a thin-film semiconductor, particularly a thin-film transistor (hereinafter abbreviated as TFT). The present invention also relates to semiconductor devices such as electro-optical devices and semiconductor circuits using such a thin-film transistor.
2. Description of the Related Art
In recent years, with the spread of liquid crystal displays (LCDs), active matrix liquid crystal displays (AMLCD) are required to have improved performance. However, there are various problems that have obstructed such improvement in performance.
Increase in operation speed is one item of the required improvements in performance. However, it is known that the self-heating of a TFT increases as the operation speed is increased. This is also problematic in integrated circuits ICs.
In particular, in circuits, such as driver circuits (a buffer, an analog switch, etc.), in which a large current needs to flow and which are constituted of TFTs having a very long channel width (W), each constituent TFT exhibits a high degree of self-heating and the temperature of the entire circuit may become abnormally high. There is one report that the temperature increased to as high as several hundred degrees centigrade in certain situations.
The self-heating varies or deteriorates the characteristics of a TFT and makes it difficult to make highly reliable products. To suppress self-heating of a TFT having a long channel width, the following conventional technique has been proposed.
FIG. 2A
is a schematic top view showing an active layer (thin-film semiconductor layer) of a TFT.
FIGS. 2B-2D
are sectional views taken along lines A—A′, B—B′, and C—C′ in
FIG. 2A
, respectively.
In
FIG. 2A
, reference numeral
201
denotes a substrate having an insulative surface, while and
202
and
203
denote a pair of impurity regions formed by adding an n-type or p-type impurity to an active layer that is a semiconductor thin film. The impurity regions
202
and
203
serve as source/drain regions.
The pair of impurity regions
202
and
203
are formed in a self-aligned manner by using a gate electrode
204
as a mask. The region under the gate electrode
204
is doped with neither of those impurities, and channel forming regions
205
are formed there (see FIGS.
2
B and
2
D).
The conventional structure shown in
FIGS. 2A-2D
has a feature that openings
206
formed in the active layer in patterning it and the channel forming region divided into a plurality of parts. Hence, substantially a plurality of TFTs are arranged in parallel.
The openings
206
function as heat sinks for escape of Joule heat generated in the channel forming regions
205
. This technique allows Joule heat generated in the channel forming regions
205
to escape efficiently, thereby reducing the amount of heat generated in the TFT and in turn securing its reliability.
In the conventional technique shown in
FIGS. 2A-2D
, the regions
206
serving as the heat sinks are filled with a gate insulating film
207
. Therefore, the channel forming regions
205
are insulated from each other by the gate insulating film
207
.
As a result Joule heat generated in the channel forming regions
205
is introduced to the gate insulating film (typically a silicon oxide film)
207
. However, the efficiency of heat dissipation is not high because the heat conductivity of silicon oxide (about 1.4 W/mK) is two orders smaller than that of silicon (about 150 W/mK). This results in the problem as a sufficient level of heat dissipation effect cannot be obtained.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a TFT having a heat sink that exhibits a higher degree of heat dissipation effect than in the conventional technique, thereby resulting in a highly reliable semiconductor device.
The present invention provides a semiconductor device comprising a semiconductor circuit having a plurality of thin-film transistors that use a thin-film semiconductor as an active layer, wherein the active layer comprises a pair of impurity regions exhibiting an n-type or p-type conductivity and an intrinsic or substantially intrinsic region interposed between the pair of impurity regions; and wherein the intrinsic or substantially intrinsic region comprises a first region and second regions projecting from the first region, only the first region being overlapped with a gate electrode.
One important feature of the present invention is that in the above configuration the first region has been formed in a self-aligned manner by using the gate electrode as a mask and the second regions have been formed intentionally by photolithography.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor circuit having a plurality of thin-film transistors that use a thin-film semiconductor as an active layer, wherein the active layer comprises a pair of impurity regions exhibiting an n-type or p-type conductivity and an intrinsic or substantially intrinsic region interposed between the pair of impurity regions; and wherein the intrinsic or substantially intrinsic region assumes a double-sided comb shape that comprises a trunk portion extending approximately perpendicularly to a channel direction and branch portions extending approximately parallel with the channel direction, only the trunk portion being overlapped with a gate electrode.
In each of the above configurations, the thin-film semiconductor can be a silicon semiconductor or a compound semiconductor including silicon.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor, comprising the steps of forming an active layer by patterning a thin-film semiconductor; forming a gate electrode above the active layer via an insulating film; forming one or a plurality of island-like mask patterns so that they cross the gate electrode and extend perpendicularly to a longitudinal direction of the gate electrode; and adding an n-type or p-type impurity to the active layer by using the gate electrode and the one or a plurality of mask patterns as masks.
According to still a further aspect of present invention, there is provided a method of manufacturing a semiconductor, comprising the steps of forming a gate electrode; forming an active layer made of a thin-film semiconductor above the gate electrode via an insulating film; forming an insulating film pattern having a double-sided comb shape above the active layer; and adding an n-type or p-type impurity to the active layer by using the insulating film pattern as a mask.
In each of the above manufacturing methods, each of a pair of impurity regions formed by the impurity adding step assumes a comb-teeth shape and the teeth portions of the pair of impurity regions are opposed to each other. That is, an intrinsic or substantially intrinsic region having a double-sided comb shape is formed under the insulating film pattern as the mask in the impurity adding step.
REFERENCES:
patent: 5397904 (1995-03-01), Arney et al.
patent: 5874746 (1999-02-01), Holmberg et al.
patent: 5895935 (1999-04-01), Yamazaki et al.
patent: 5986306 (1999-11-01), Nakajima et al.
patent: 6184559 (2001-02-01), Hayakawa et al.
Fukunaga Takeshi
Nakajima Setsuo
Abraham Fetsum
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Semiconductor Energy Laboratory Co,. Ltd.
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