Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-10-02
2003-07-29
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S758010, C324S765010, C324S1540PB
Reexamination Certificate
active
06600329
ABSTRACT:
The present application claims priority under 35 U.S.C. §119 to Korean Application No. 2000-61265 filed on Oct. 18, 2000, which is hereby incorporated by reference in its entirety for all purposes.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for inspecting electrical properties of a wafer and an apparatus therefor, more particularly to a method for inspecting electrical properties of a wafer by using a probe station having a probe card and a performance board installed therein and an apparatus for inspecting the electrical properties of the wafer.
2. Description of the Related Art
Currently, due to widespread usage of computers in information media, developments in semiconductor memory devices are advancing at a rapid pace, to provide semiconductor devices having high memory storage capacity and faster operating speed. To this end, the current technology is focused on developing and realizing memory devices having a high degree of integration, response speed, and reliability.
A semiconductor device generally may be manufactured by using a wafer composed of silicon (Si). In general, the manufacturing technology of semiconductor devices includes a fabrication process and an assembly process. In the fabrication process, a structure having integrated circuits is manufactured by repeatedly forming predetermined patterns on a wafer. Also, in the assembly process, the wafer having the structure thereon is cut into chip units, and then the chips are packaged. An electrical die sorting (EDS) process is carried out between the fabrication and the assembly processes, so as to inspect electrical properties of the structure formed on the wafer.
During the electric die sorting process, the structure on the wafer is inspected to determine whether the structure has good or bad electrical properties. A structure having bad electrical properties is removed during the electric die sorting process before the assembly process is performed, so that manufacturing effort and cost may be reduced during the assembly process and so that a structure having bad electric qualities is detected early and repaired.
Electric die sorting processes for inspecting electrical properties of a wafer are disclosed in Japanese Patent Laid Open Publication No. Hei 6-181248, Japanese Patent Laid Open Publication No. Hei 10-150082, U.S. Pat. No. 5,254,939 (issued to Anderson et al.), U.S. Pat. No. 5,506,498 (issued to Anderson et al.) and U.S. Pat. No. 5,886,024 (issued to De Villeneuve).
In electric die sorting processes for inspecting the electrical properties of a wafer, the electrical properties of a structure on the wafer are inspected by a probe station having a probe card and a performance board therein. Then, a tester verifies the inspection result from the electric die sorting processes for inspecting the electrical properties of the wafer. In this case, the structure on the wafer may be a 64 mega bit direct random access memory (DRAM) or a 256 mega bit DRAM, for example. Hence, elements such as the probe card and the performance board of the probe station should be suitably installed according to the structure to be inspected.
However, the probe card and the performance board have a construction such that a user manually installs the probe card and the performance board in the probe station in accordance with the inspection process, so that the probe card and the performance board frequently do not correctly match the structure on the wafer.
To overcome such a problem, elements such as the probe card and the performance board are automatically installed by using a computer, as in U.S. Pat. No. 5,254,939. Also, in U.S. Pat. No. 5,506,498, information members are formed on the probe card, and the information members include information identifying that the probe card inspects predetermined sorts of wafers. Furthermore, Japanese Patent Laid Open Publication No. Hei 10-150082 presents discrimination numbers endowed to the probe card and the performance board, which identify the type of the probe card and the performance board. Therefore, a probe card and a performance board that are suitable to a structure having an integrated circuit (IC) formed on a wafer, are installed in the probe station by utilizing the information members or the discrimination numbers.
Although a probe card and a performance board suitable to the structure may be installed in the probe station by using the information members or the discrimination numbers, the inspection process is however continuously disturbed due to various installations of the probe card and the performance board. This is because the probe card and the performance board are not verified as to whether or not they respectively match a probe card and a performance board required to inspect identical sorts of wafers from among some wafers to be inspected during the inspection process. That is, the information member or the discrimination numbers can be respectively verified for a probe card and performance board. However, the information member or the discrimination numbers cannot be used to decide whether a probe card and a performance board respectively match a probe card and a performance board for inspecting identical sorts of wafers.
For example, when a wafer having a structure such as a 64 mega bit DRAM is inspected, the probe card and the performance board should be suitable for the structure of the 64 mega bit DRAM. Hence, the probe card and the performance board are installed after the probe card and the performance board are sufficiently verified. However, it is difficult to verify one of the probe card and the performance board when the probe card for inspecting a 256 mega bit DRAM or the performance board for inspecting a 256 mega bit DRAM are already installed.
Therefore, an inferior inspection process frequently occurs and the manufacturing reliability of the semiconductor device is reduced, because information about the probe card cannot be compared with information about the performance board, even though the probe card and the performance board should be verified by using the information members or the discrimination numbers.
SUMMARY OF THE INVENTION
The present invention is therefore directed to a method for inspecting electrical properties of a wafer and an apparatus therefor, which substantially overcome one or more of the problems due to the limitations and disadvantages of the related art.
It is therefore a first objective of the present invention to provide a method for inspecting electrical properties of a wafer, which enables verification of a probe card and a performance board in a probe station for inspecting identical sorts of wafers, by providing information members for the probe card and the performance board and by comparing the information members.
It is a second objective of the present invention to provide an apparatus for inspecting electrical properties of a wafer, which enables verification of a probe card and a performance board in a probe station for inspecting identical sorts of wafers, by providing information members for the probe card and the performance board and by comparing the information members.
To accomplish the first objective of the present invention, an embodiment of the present invention provides a method for inspecting electrical properties of a wafer. A probe card and a performance board are installed in a probe station for inspecting electrical properties of wafers, wherein the probe card makes contact with the wafers to transfer an electric signal and to receive an electric signal, and the performance board transfers and receives the electric signal through the probe card. Whether the probe card and the performance board respectively correspond to a probe card and a performance board usable to respectively inspect predetermined sorts of wafers among the wafers is verified. Then, a previously input inspecting information corresponding to an inspection is read out by utilizing the probe card and the performance board, when the probe card and the performance board resp
Nguyen Jimmy
Samsung Electronics Co,. Ltd.
Volentine & Francos, PLLC
LandOfFree
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