Static information storage and retrieval – Systems using particular element – Ferroelectric
Reexamination Certificate
2001-12-11
2003-09-09
Tran, M. (Department: 2818)
Static information storage and retrieval
Systems using particular element
Ferroelectric
C365S171000
Reexamination Certificate
active
06618284
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory including a ferroelectric capacitor and a method for driving the same.
A semiconductor memory including a ferroelectric capacitor is expected to work as a nonvolatile memory capable of providing a limitless read number.
A conventional semiconductor memory including a ferroelectric capacitor will now be described with reference to FIG.
8
.
As shown in
FIG. 8
, a source region
2
and a drain region
3
are formed in surface portions of a silicon substrate
1
. On a region of the silicon substrate
1
sandwiched between the source region
2
and the drain region
3
, a silicon oxide film
4
, a ferroelectric film
5
of a metal oxide such as lead zirconate titanate (PZT) or bismuth tantalate strontium (SBT) and a gate electrode
6
are successively formed, so as to together form a ferroelectric FET.
In this structure, the polarization direction of the ferroelectric film
5
can be set to the upward direction or the downward direction, and the depth of surface potential of a region of the silicon substrate
1
below the gate electrode
6
can be set to two different states respectively corresponding to the two polarization states (namely, the upward polarization and the downward polarization). Since the depth of the surface potential corresponds to the resistance between the source and the drain of the ferroelectric FET, the resistance between the source and the drain is set to either a high value or a low value depending upon the polarization direction of the ferroelectric film
5
. Since the upward polarization or the downward polarization is kept (stored) as far as the polarization of the ferroelectric film
5
is kept, the ferroelectric FET can be used as a nonvolatile memory.
In the ferroelectric FET having this structure, a state where the ferroelectric film
5
has the downward polarization is allowed to correspond to, for example, a data “1” and a state where it has the upward polarization is allowed to correspond to a data “0”. For example, when a ground potential is applied to the lower face of the silicon substrate
1
with a large positive voltage applied to the gate electrode
6
, the polarization of the ferroelectric film
5
can be set to the downward polarization. Alternatively, when a ground potential is applied to the lower face of the silicon substrate
1
with a large negative voltage applied to the gate electrode
6
, the polarization of the ferroelectric film
5
can be set to the upward polarization. After setting the polarization of the ferroelectric film
5
to the downward or upward polarization, the potential of the gate electrode
6
is restored to the ground potential.
FIGS. 9A
,
9
B and
9
C are energy band diagrams obtained when the silicon substrate
1
has p-type conductivity and the source region
2
and the drain region
3
have n-type conductivity.
FIG. 9A
shows the energy band obtained when the polarization is downward (namely, a data “1” is stored),
FIG. 9B
shows the energy band obtained when the polarization is upward (namely, a data “0” is stored) and
FIG. 9C
shows the thermal equilibrium energy state. In
FIGS. 9A through 9C
, a reference numeral
11
denotes the conduction band of the gate electrode
6
, a reference numeral
12
denotes the energy band of the ferroelectric film
5
, a reference numeral
13
denotes the energy band of the silicon oxide film
4
, a reference numeral
14
denotes the energy band of the silicon substrate
1
and a reference numeral
15
denotes the energy band of a depletion layer formed in the vicinity of the surface of the silicon substrate
1
. Also, a void arrow denotes the polarization direction of the ferroelectric film
5
.
In the case of the downward polarization (corresponding to a data “1”), the negatively ionized depletion layer
15
extends to a deep region of the silicon substrate
1
as shown in
FIG. 9A
, and hence, the surface potential of the silicon substrate
1
becomes lower than the ground potential.
In the case of the upward polarization (corresponding to a data “0”), no depletion layer is formed in the silicon substrate
1
because holes, that is, p-type carriers, are stored on the surface of silicon substrate
1
as shown in
FIG. 9B
, and hence, the surface potential of the silicon substrate
1
accords with the ground potential.
Since the surface potential of the region of the silicon substrate
1
below the gate electrode
6
thus depends upon the polarization direction, when a potential difference is caused between the drain and the source, a current flowing between the drain and the source is different depending upon the polarization direction. Specifically, when the surface potential of the silicon substrate
1
is lower than the ground potential (namely, when a data “1” is stored), the resistance between the drain and the source is low (namely, the FET is in an ON state), and hence, a large current flows between the drain and the source. On the other hand, when the surface potential of the silicon substrate
1
accords with the ground potential (namely, when a data “0” is stored), the resistance between the drain and the source is high (namely, the FET is in an OFF state), and hence, substantially no current flows between the drain and the source. When a current value between the drain and the source is detected, it can be found whether the ferroelectric FET is in the state corresponding to a data “1” or in the state corresponding to a data “0”.
Since whether the ferroelectric FET is in the state corresponding to a data “1” or in the state corresponding to a data “0” can be thus found, the polarization of the ferroelectric film
5
is not reversed in reading a data from the ferroelectric FET. Thus, what is called a non-destructive read-out system is realized. In other words, there is no need to carry out an operation for recovering the direction or the magnitude of the polarization, namely, a rewrite operation, after data read.
In this manner, a ferroelectric FET is capable of a non-destructive read operation, and therefore, a problem of polarization fatigue of a ferroelectric film, which is caused in a destructive read operation accompanying polarization reversal, can be avoided. Accordingly, the ferroelectric FET is expected to work as a nonvolatile memory capable of providing a limitless read number.
However, the ferroelectric film
5
of the ferroelectric FET is generally a semiconductor having a large number of defective levels, and hence, electrons and holes can easily move within the ferroelectric film
5
.
Therefore, when the ferroelectric FET is in an ON state as shown in
FIG. 9A
, since electrons are injected from the conduction band
11
of the gate electrode
6
into the ferroelectric film
5
, charge at the head of the polarization is neutralized and hence the bottom of the potential in a V shape is gradually elevated, resulting in the thermal equilibrium energy state shown in FIG.
9
C.
On the other hand, when the ferroelectric FET is in an OFF state as shown in
FIG. 9B
, since holes are injected from the conduction band
11
of the gate electrode
6
into the ferroelectric film
5
, charge at the head of the polarization is neutralized and hence the apex of the potential in a reverse V shape is gradually lowered, also resulting in the thermal equilibrium energy state shown in FIG.
9
C.
As a result, since the surface potential of the silicon substrate
1
becomes the same level in spite of the different polarization directions, namely, the upward polarization and the downward polarization, it is difficult to distinguish the two states depending upon a current flowing between the drain and the source.
This problem can be explained by using a hysteresis curve
20
of the ferroelectric capacitor and a gate capacitance load line
21
of the ferroelectric FET drawn on a polarization—voltage (Q-V) plane shown in FIG.
10
. The structure of the ferroelectric FET of
FIG. 8
can be regarded as a series circuit of the ferroelectric capacitor and a metal—oxide film—silicon (MOS)
Kato Yoshihisa
Shimada Yasuhiro
Yamada Takayoshi
Matsushita Electric - Industrial Co., Ltd.
Nixon & Peabody LLP
Studebaker Donald R.
Tran M.
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