Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2002-05-02
2003-09-16
Lam, Tuan T. (Department: 2816)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S040000, C326S026000
Reexamination Certificate
active
06621297
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit for preventing or suppressing a malfunction of a semiconductor device due to an external noise, and particularly, to a semiconductor device malfunction preventive circuit which can be configured inside a semiconductor device.
2. Description of the Related Art
A semiconductor device is supported by a fine processing technique, and its manufacturing process has tended to become finer in recent years with the progress of a semiconductor manufacturing technique.
As the manufacturing process thus becomes finer, the pattern structure, arrangement, and so on of a semiconductor device are naturally made finer.
Meanwhile, as a semiconductor device is thus made finer, a malfunction of a semiconductor device due to an electrostatic pulse (ESD pulse) caused by electrostatic discharge shows an increasing tendency. Especially, it is generally known that an ESD pulse invading a semiconductor device reaches as high as the order of several kV in a short time as a semiconductor device is thus made finer.
A malfunction in a semiconductor device due to a so-called external noise such as electrostatic discharge as mentioned above will be explained here with reference to
FIG. 3
to FIG.
6
.
First, a configuration example of a conventionally and generally known so-called PLD (Programmable Logic Device) which is structured to allow a user to set a desired logic circuit therein is shown in
FIG. 3
as one example of a semiconductor device.
This PLD is mainly composed of a section called a macrocell logic cell
201
which is structured to allow a desired logic circuit to be configured therein and a section called an input/output cell
202
for executing the distribution and so on of a signal generated in the macrocell logic cell
201
and a signal inputted to the macrocell logic cell
201
from an external part.
The PLD also includes a plurality of input/output pins
203
for outputting the signal generated in the macrocell logic cell
201
to the external part via the input/output cell
202
and inputting the signal to the macrocell logic cell
201
from the external part.
The PLD as described above is used in various electronic devices, systems, and so on, and it is generally thought that various external noises invade such electronic devices and so on as described below.
Specifically, a so-called non-contact noise N
S1
such as an electromagnetic wave which directly invades various electrical systems S from space, not via a signal cable, a power supply cable, or the like, is first thought to exist, as shown in FIG.
4
. Besides, there also exists a so-called contact noise N
S2
which occurs, for example, when static electricity stored in a body of a user or the like of the system S invades the system S due to ESD caused by the user's contact with the system S (sometimes without the user's contact).
There also exists a noise N
S3
invading the system S from a power supply (not shown) via a power supply cable C
1
for supplying a power supply voltage to the system S.
There also exists a noise N
S4
invading the system S via a connecting cable C
2
from another system S
AN
connected to the system S.
There is of course the possibility that the non-contact noise N
S1
such as an electromagnetic wave, an ESD pulse caused by ESD, and so on invade the not-shown power supply and the other system S
AN
, and that these non-contact noise N
S1
and ESD pulse also invade the system S from the power supply and the other system S
AN
via the power supply cable C
1
and the connecting cable C
2
.
Especially, the ESD pulse among these various external noises sometimes reaches as high as several kV in an instant, and therefore, is highly possible to give a fatal physical damage to the system S. A semiconductor device in recent years is often protected against ESD to minimize the physical damage. However, in view of the recent circumstances in which a demand for further protection against ESD has been increasing as the semiconductor device manufacturing process has become finer, it cannot be said that sufficient protection is given at present.
The malfunction of the PLD due to the ESD pulse will be explained here with reference to FIG.
5
and FIG.
6
.
First,
FIG. 5
schematically shows how the ESD pulse invades the PLD from the external part. In
FIG. 5
, it is assumed that a reset signal for resetting the operation of, for example, an electronic device, various systems, or the like in which this PLD is used and a control signal necessary for generating the reset signal are applied to an output pin
203
a.
It is also assumed that, when the signal outputted to this output pin
203
a
is a reset signal, this reset signal has a logical value of Low (0) at the time of resetting, and its output state is maintained at a logical value of High (1) in its normal state in which it does not execute the resetting operation (refer to
FIG. 6
(A)).
On the above assumption, when the ESD pulse invades to cause a malfunction inside the macrocell logic cell
201
in the state when the signal with the logical value High is outputted from the output pin
203
a
, the output state of the output pin
203
a
in which the logical value should be High sometimes changes to the logical value Low at random, for example, as shown in FIG.
6
(B).
The period of the logical value High, the period of the logical value Low, and so on are often strictly defined for the reset signal of an electronic device and so on and for a signal whose operation is equivalently important to the reset signal. Therefore, there is a concern that, since the state of the malfunction as described above does not allow normal resetting, the malfunction may give a fatal influence to the operation of the electronic device and so on, such as that they are brought into an uncontrollable state.
SUMMARY OF THE INVENTION
The present invention is made in view of the above-described circumstances, and it is an object of the present invention to provide a semiconductor device malfunction preventive circuit, a semiconductor device, and an electronic device which can suppress a malfunction in various electronic devices, systems, and so on due to an external noise and which can enhance operational reliability.
According to a first aspect of the present invention, provided is a semiconductor device malfunction preventive circuit which is disposed inside a semiconductor device, and which is so structured that a signal necessary for normalizing an operation of an electronic device using the semiconductor device is generated based on a monitoring result of a predetermined signal, to enable an improper output state of an output signal of the semiconductor device due to invasion of an external noise to be solved.
According to the above-described structure, the signal necessary for normalizing the operation of the electronic device is generated when necessary based on the monitoring result of the predetermined signal, and therefore, the semiconductor device malfunction preventive circuit which can prevent the electronic device from getting into an uncontrollable state is provided.
According to a second aspect of the present invention, provided is a semiconductor device malfunction preventive circuit which is disposed inside a semiconductor device, and which is so structured that a signal for forcibly resetting an operation of an electronic device using the semiconductor device is outputted based on a monitoring result of an output signal of the semiconductor device, to enable an improper output state of the output signal of the semiconductor device due to invasion of an external noise to be solved.
REFERENCES:
patent: 5059836 (1991-10-01), Lee et al.
patent: 5418486 (1995-05-01), Callahan
patent: 5591992 (1997-01-01), Leach
patent: 0 533 336 (1993-03-01), None
patent: 5-235274 (1993-09-01), None
patent: 6-132485 (1994-05-01), None
Patent Abstracts of Japan, Publication No. 05-235274, Publication Date Sep. 10, 1993, 2 pages.
Patent Abstracts of Japan, Publication No. 06-132485, Pub
Allied Telesis K.K.
Lam Tuan T.
Nguyen Hiep
Rosenthal & Osha L.L.P.
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