Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-10-10
2003-09-30
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S486000
Reexamination Certificate
active
06627486
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for producing a crystalline silicon film that is formed on an insulating substrate such as a glass substrate, or a semiconductor substrate such as a single crystal silicon substrate, on which an insulating film is formed. In particular, the present invention relates to a method for obtaining a crystalline silicon film having a favorable crystalline state, comprising crystallizing an amorphous silicon film by means of annealing, in which lateral growth is allowed to occur on the amorphous silicon film by using a catalyst element (e.g., nickel) which accelerates the crystallization. Also, the invention relates to a method for manufacturing a semiconductor using such a crystalline silicon film.
2. Description of the Related Art
A crystalline silicon film that is formed on an insulating surface is indispensable for a semiconductor device such as a thin film transistor.
In general, a crystalline silicon film is obtained by crystallizing an amorphous silicon film by means of heating the amorphous silicon film or by irradiating laser light.
However, considering the electric properties, the crystalline silicon film obtained by heating or by irradiating a laser light is far inferior to a single crystal silicon wafer. Moreover, at present, a thin film transistor (referred to as a “TFT”) implemented by using such crystalline silicon films is also far inferior to a MOS-type transistor using a single crystal silicon wafer.
This is ascribed to the fact that the crystalline silicon film thus obtained contains defects at high density.
At present, the operation speed of a TFT consisting of a crystalline silicon film using an amorphous silicon film as the starting film is about several MHz or lower at best.
In contrast to above, an integrated circuit using a single crystal wafer having an operation speed of about 200 MHz is already put into practical use.
In case a technology generally known as SOI technology is employed, a MOS-type transistor having an operation speed exceeding the case of using a single crystal wafer is obtained because the capacitance is effectively reduced.
This technology comprises forming a single crystal layer on the silicon oxide layer by utilizing a single crystal silicon wafer. However, this technology is not practically feasible because of its disadvantages such that the size of the single crystal wafer is limited, and that it requires a complicated and costly manufacturing process.
According to the study of the present inventors, it is known that, by using particular kinds of metal elements which accelerate the crystallization of silicon, an amorphous silicon film can be modified into a high quality crystalline silicon film at a lower temperature and in a shorter duration of time.
The metal elements which accelerate the crystallization of silicon include nickel (Ni), platinum (Pt), palladium (Pd), copper (Cu), silver (Ag), and iron (Fe).
In particular, the direction of crystal growth can be controlled by non-selectively introducing such metal elements, and thus, silicon films having the preferred crystal structure suitable for devices can be obtained.
By employing such a technology, a TFT having characteristics well comparable to those of a MOS-type transistor using a single crystal silicon wafer can be realized (see Japanese Patent Application No. 8-335152 filed by the present inventors on Nov. 29, 1996).
This technology is denoted as “lateral growth method”. In a silicon film obtained by the lateral growth method, crystal grain boundaries are formed in parallel with the direction of growth; hence, by controlling the direction of electric current to be in parallel with the direction of crystal growth, the effect of the crystal grain boundaries can be reduced extremely. As a result, a polycrystalline material having characteristics well equivalent to those of a single crystal material can be realized.
The lateral growth method is described briefly below. The method comprises forming a mask film made of silicon oxide and the like on an amorphous silicon film, and forming selectively a window therein. A metal element, representatively nickel, which accelerates the crystallization of silicon, is introduced into the amorphous silicon film through this window. In
FIG. 1A
, a window is denoted by reference numeral
11
.
As a method for introducing the metal element, there can be mentioned a method comprising depositing on a predetermined region of the amorphous silicon film, a film of a compound containing the metal element by means of sputtering (see Japanese Unexamined Patent Publication No. 7-45519 or 7-66425), a vapor growth method (Japanese Unexamined Patent Publication No. 7-335548), or a coating method (Japanese Unexamined Patent Publication No. 7-130652).
Then, by performing annealing for crystallization, the region of crystalline silicon (lateral growth region)
13
is expanded around the window. Such a region can be obtained because the catalyst element crystallizes the amorphous silicon film while it diffuses inside the silicon film. In general, crystallization proceeds farther for higher temperature and longer duration (see
FIG. 1A
; details are described in the unexamined patent publications mentioned above). This crystal growth is called lateral growth because it proceeds in the direction parallel with the film plane.
The properties of the semiconductor device can be improved by arranging the direction of lateral growth to match with the direction of current flow in semiconductor devices such as a thin film transistor (TFT). Specifically, TFTs can be arranged in a variety of ways. An example of such ways is shown in FIG.
3
. Referring to
FIG. 3
, there is shown a crystallized region
302
obtained by lateral growth around a window portion
301
into which the catalyst element is added.
In such a case, an oval laterally grown region as shown in
FIG. 3
can be obtained if a rectangular window
301
is provided. In this case, the gate electrode
304
is arranged approximately in parallel with the region
301
as is shown by TFT
1
, so that crystal growth may occur in a direction from drain
305
to source
303
, or in the reversed direction.
Furthermore, as is shown in TFT
2
of
FIG. 3
, there are cases in which the region
301
is arranged approximately vertical to the gate electrode
307
, so that the crystal growth may occur approximately simultaneously with source
306
and drain
308
. Thus, concerning the characteristics of the resulting TFT, high ON current is obtained when the former method is adopted because the crystal grain boundaries are arranged in a direction parallel to the direction of current flow. In contrast to this, a TFT with high OFF current results when the latter method is adopted, because the crystal grain boundaries are arranged in a direction vertical to the direction of current flow.
Otherwise, the window may be narrowed into a line so that the catalyst element is added linearly.
FIGS. 4A and 4B
show a case of a circuit provided with a plurality of TFTs, in which the regions
401
and
406
of catalyst element addition are formed in parallel with the gate lines
402
and
407
.
FIG. 4A
corresponds to TFT
2
shown in
FIG. 3
, which is the case of adding catalyst elements approximately vertical to the gate electrodes of the TFTs
403
to
405
.
FIG. 4B
corresponds to TFT
1
shown in
FIG. 3
, which is the case of adding catalyst elements approximately vertical to the gate electrodes of the TFTs
408
to
410
.
Controlling the direction of crystal growth by using the lateral growth process is effective in sophisticated semiconductor integrated circuits in which devices having functions conflicting to each other are formed on a single substrate.
FIG. 5
shows a block diagram of a monolithic active matrix circuit for use in liquid crystal displays. Referring to
FIG. 5
, a source driver (column driver)
501
and gate driver (row driver)
502
are provided as peripheral driver circuits. In the figure are also shown a video signal
Asami Taketomi
Fujimoto Etsuko
Ohtani Hisashi
Takano Tamae
Fish & Richardson P.C.
Niebling John F.
Semiconductor Energy Laboratory Co,. Ltd.
Simkovic Viktor
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