Method and apparatus for implementing fault tolerant logic...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S042000, C714S053000, C360S048000, C360S078080

Reexamination Certificate

active

06587973

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to storage systems and more particularly to a method and apparatus for implementing fault tolerant logic in a storage system.
BACKGROUND OF THE INVENTION
Traditionally, mass storage systems have been based upon magnetic media, such as floppy disks, hard drives, and tapes. In recent years, however, because of their high storage capacities, optical media have also been used effectively for mass storage purposes. Optical media include CD-ROM's (compact disk-read only memory), recordable CD's, and re-writable CD's. Typically, information is written onto an optical medium by imposing marks and spaces or pits and lands onto the medium. These are later detected by a reading mechanism to extract information from the optical medium.
Typically, information is written onto a CD in the form of packets. Each packet usually comprises a certain number of data blocks, and each packet is separated from other packets by a link sequence. A typical packet arrangement is shown in
FIG. 1
, wherein a plurality of packets
102
are shown with link sequences
104
imposed therebetween. The link sequences
104
provide distinct separations between the data packets
102
, which makes management of data on the CD much simpler.
As shown, a typical link sequence
104
comprises a series of seven blocks. These blocks include two RUNOUT blocks
106
,
108
, one link block
110
, and four RUNIN blocks
112
-
118
. The RUNOUT blocks
106
,
108
signal the end of the previous packet, the RUNIN blocks
112
-
118
signal the beginning of the next packet, and the link block
110
provides the transition between the RUNOUT blocks
106
,
108
and the RUNIN blocks
112
-
118
. One of the main purposes of the link sequence blocks
106
-
118
is to provide sufficient “padding” to enable the writing mechanism to start and to stop gracefully.
More specifically, when writing information onto a CD, it is often necessary to stop the writing mechanism after writing a certain packet, and then to restart the writing mechanism to write the next packet. This is especially true in recordable and rewritable CD systems. The link sequence blocks
106
-
118
are designed to accommodate this. Specifically, when the writing mechanism is writing the last packet of a file, it: (1) writes the last data packet; (2) writes the two RUNOUT blocks
106
,
108
; (3) writes a portion of the link block
110
; and (4) then stops gracefully. When it comes time to write the next data packet, the writing mechanism: (1) starts gracefully; (2) completes writing the link block
110
; (3) writes the RUNIN blocks
112
-
118
; and (4) then writes the next data packet.
Ideally, in writing the link sequence blocks
106
-
118
, the writing mechanism maintains the integrity of the blocks
106
-
118
. Unfortunately, due to shortcomings in the current technology, it has been found that the writing mechanism often corrupts the information in some of the link sequence blocks, particularly, the second RUNOUT block
108
, the link block
110
, and the first two RUNIN blocks
112
,
114
. If this corruption occurs in the data portion of the link sequence blocks, not much harm is done since the link sequence blocks do not contain actual valid data. However, if the corruption occurs in the header portion of the link sequence blocks, serious errors may result. This is because the header contains important information (such as the type of the block and the address of the block) that is used in accessing and processing information on the CD. If errors are introduced into the headers of the link sequence blocks, the integrity of the stored data may be compromised.
Various errors may result from header corruption, but three of the most serious potential errors are: (1) false triggering; (2) false target matching; and (3) false target missing. A false triggering error may occur if the header of more than one link sequence block
106
-
118
in a link sequence indicates that it is the first RUNOUT block
106
. For example, if the header of the second RUNIN block
114
is corrupted so that it indicates that it is the first RUNOUT block
106
, a false triggering error will occur. A false triggering error may cause one or more data blocks to be mistakenly treated as a link sequence block.
To elaborate, whenever a header indicating a first RUNOUT block
106
of a link sequence is detected, a trigger signal is issued which informs a processing mechanism that the next seven blocks will be link sequence blocks. In response to this signal, the processing mechanism treats the next seven blocks as link sequence blocks. If this header is detected in an actual first RUNOUT block
106
, then processing of the next seven blocks will be proper. However, if this header appears in a block other than a first RUNOUT block
106
, then subsequent data blocks may be treated as link sequence blocks, a very undesirable result. For example, if the header of the second RUNIN block
114
is corrupted so that it indicates that it is the first RUNOUT block
106
, it will cause the trigger signal to be issued, which in turn will cause the RUNIN blocks
114
,
116
,
118
and the following four data blocks of the next data packet to be treated as link sequence blocks. Treating data blocks as link sequence blocks causes data to be lost, as well as other problems. Thus, false triggering is a serious problem.
Another potentially serious problem is that of false target matching. As mentioned previously, the header of a block includes the address of the block on the storage medium. This address is unique to each block, and is used to identify and to locate each block. If the address of a block is corrupted so that it becomes the same as that of another block, it may lead to the issuance of an erroneous target match signal. For example, if a target data block has an address X, and if the header of RUNIN block
114
is corrupted so that its address indicates that it is at address X, then an attempt to find the target data block may result in locating RUNIN block
114
instead. This can lead to serious data errors.
A third and related potential problem is that of false target missing. Typically, when searching for a target block, if a certain number (e.g. three) of blocks have been encountered having location values greater than that of the target block, a target miss signal is asserted. This signal informs a controller that it has gone past the target block, and causes the controller to try again. If a sufficient number of link sequence blocks are corrupted in a particular manner, false target misses may occur. For example, if blocks
108
,
110
, and
112
have all been corrupted such that their location values are greater than a subsequent data block, they will cause a false target miss to occur each time the reading mechanism tries to read the subsequent data block. If that is the case, then the subsequent data block is in effect rendered inaccessible. This can cause substantial portions of a storage medium to be rendered useless.
As the above discussion shows, the information corruption caused by limitations in the current writing technology can lead to serious errors. As a result, a fault tolerant mechanism is needed to compensate for the information corruption.
SUMMARY OF THE INVENTION
The present invention provides an improved mechanism for implementing fault tolerant logic in an information storage system, which enables information corruption to be tolerated to a certain extent. The present invention is based, at least partially, upon the observation that a vast majority of the information corruption happens within certain link sequence blocks. That being the case, certain control signals may be inhibited during the reading of these blocks to prevent the control signals from being manifested to a processing mechanism. By doing so, the present invention prevents erroneous signals caused by information corruption from adversely affecting the operation of the system. As a result, the present invention makes it possible to tolerate the

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